13
4. Implementation Table
PXM 4/6/8K DNP3 Ethernet Communications User Manual
MN150005EN January 2017 www.eaton.com
Object
REQUEST
Master May Issue
Outstation Must Parse
RESPONSE
Master Must Parse
Outstation May Issue
Object
Number
Variation
Number
Description
Function Codes
(dec)
Qualifier Codes
(hex)
Function Codes
(dec)
Qualifier Codes (hex)
20
1
32-Bit Binary Counter (with Flag)
1 (read)
00, 01 (start-stop)
06 (no range, or all)
07, 08 (limited qty)
17, 28 (index)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 2)
20
2
16-Bit Binary Counter (with Flag)
1 (read)
00, 01 (start-stop)
06 (no range, or all)
07, 08 (limited qty)
17, 28 (index)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 2)
20
5
32-Bit Binary Counter without Flag
1 (read)
00, 01 (start-stop)
06 (no range, or all)
07, 08 (limited qty)
17, 28 (index)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 2)
20
6
16-Bit Binary Counter without Flag
1 (read)
00, 01 (start-stop)
06 (no range, or all)
07, 08 (limited qty)
17, 28 (index)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 2)
21
0
Frozen Counter – Any Variation
1 (read)
00, 01 (start-stop)
06 (no range, or all)
07, 08 (limited qty)
17, 28 (index)
21
1
32-Bit Frozen Counter (with Flag)
1 (read)
00, 01 (start-stop)
06 (no range, or all)
07, 08 (limited qty)
17, 28 (index)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 2)
21
2
16-Bit Frozen Counter (with Flag)
1 (read)
00, 01 (start-stop)
06 (no range, or all)
07, 08 (limited qty)
17, 28 (index)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 2)
21
5
32-Bit Frozen Counter with Time Of
Freeze
1 (read)
00, 01 (start-stop)
06 (no range, or all)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 1)
21
6
16-Bit Frozen Counter with Time Of
Freeze
1 (read)
00, 01 (start-stop)
06 (no range, or all)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 1)
21
9 (default –
see note 1)
32-Bit Frozen Counter without Flag
1 (read)
00, 01 (start-stop)
06 (no range, or all)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 2)
21
10
16-Bit Frozen Counter without Flag
1 (read)
00, 01 (start-stop)
06 (no range, or all)
129 (response)
00, 01 (start-stop)
17, 28 (index –see
note 2)
22
0
Counter Change Event – Any Variation
1 (read)
06 (no range, or all)
07, 08 (limited qty)
22
1 (default –
see note 1)
32-Bit Counter Change Event without
Time
1 (read)
06 (no range, or all)
07, 08 (limited qty)
129 (response)
17, 28 (index)
22
2
16-Bit Counter Change Event without
Time
1 (read)
06 (no range, or all)
07, 08 (limited qty)
129 (response)
17, 28 (index)
22
5
32-Bit Counter Change Event with Time
1 (read)
06 (no range, or all)
07, 08 (limited qty)
129 (response)
17, 28 (index)
22
6
16-Bit Counter Change Event with Time
1 (read)
06 (no range, or all)
07, 08 (limited qty)
129 (response)
17, 28 (index)