Electrical Tests
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Specification Reference
Section 11.4.1
5.3
U2 Power Consumption
Test Summary
This test verifies that the PUT’s power consumption during the U2 low-power state is within the
correct limits. Examiner will place the link into U2 from configured, addressed, and default
states, using a Link Management Packet (LMP). Examiner will report current, power, and VBus
for each test.
Test Steps and Expected Results
1.
Examiner brings the link to the U0 state.
2.
Examiner issues one or more standard descriptor requests.
3.
Examiner places the device into each device state (configured, addressed, and default) in
three separate tests before commanding the device to enter U2 in each test. Current is
measured once the link is in U2, as described below.
4.
Examiner issues a Set Link Functionality LMP with the Force_Link_PM_Accept bit set to one.
5.
Examiner issues an LGO_U2 link command.
The device must reply with an LAU link command.
6.
Examiner issues an LPMA link command to place the link into U2.
In all three tests, the device must draw less than 150ma.
Specification Reference
Section 11.4.1
5.4
U3 Power Consumption
Test Summary
This test verifies that the PUT’s power consumption during the U3 low-power state is within the
correct limits. Examiner will place the link into U3 from configured, addressed, and default
states, using the LGO_U3 link command. Examiner will report current, power, and VBus for
each test.