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Electrical Tests
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Test Steps and Expected Results
1.
Examiner brings the link to the U0 state.
2.
Examiner issues one or more standard descriptor requests.
3.
Examiner places the device into each device state (configured, addressed, and default) in
three separate tests before commanding the device to enter U3 in each test. Current is
measured once the link is in U3, as described below.
4.
Examiner issues an LGO_U3 link command.
The device must reply with an LAU link command.
5.
Examiner issues an LPMA link command to place the link into U3.
In all three tests, the device must draw less than [2.5ma] 150ma.
Specification Reference
Section 11.4.3
5.5
VBus Acceptance Range Tests
Test Summary
This test verifies that the PUT reaches and maintains U0 across a range of decrementing VBus
levels. Examiner will vary the VBus level from 5.30V to 3.60V in 100mV decrements for each
test. Examiner will report current, power and VBus for each test.
Test results for VBus levels between 3.60V and 4.40V are below required
levels (per specification) and are advisory only.
Test Steps and Expected Results
1.
Examiner brings the link to the U0 state using the first VBus level (5.30V).
2.
Examiner issues one or more standard descriptor requests.
3.
Examiner places the device into each device state (configured, addressed, and default) in
three separate tests, each including all VBus range increments.
4.
Examiner measures current, power, and VBus during U0.
