Link Layer Tests
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The test fails if the PUT does not transmit the Header Sequence Number
Advertisement and the Rx Header Buffer Credit Advertisement once in U0.
Examiner keeps the link active by sending LDNs for 20us.
The test fails if the PUT transmits the Port Capability LMP.
Specification Reference
Sections 7.2.4.1.1#6,8,17,22 ● 7.4.2#2,4 ● 7.5.10.4.1#1 ● 7.5.12.3.1#1,2 7.5.12.3.2#1 ●
7.5.12.4.1#1 ● 7.5.12.4.2#1
7.29
Hot Reset Initiation in U0 Test (Downstream Port
Only)
Test Summary
This test verifies that the PUT initiates Hot Reset in U0.
Test Steps and Expected Results
1.
Do steps 1 to 5 of TD7.1 (Link Bring-Up Test) to bring the link to U0.
2.
Examiner prompts the test operator to initiate a Hot Reset on the PUT through USB30CV.
3.
Examiner waits for TS1s from the PUT.
The test fails if the PUT does not transmit the TS1 ordered sets.
4.
Examiner transmits the TS1 ordered sets and waits to receive TS2 ordered sets with Reset
bit asserted.
The test fails if the PUT does not transmit the TS2 ordered sets with Reset bit
asserted.
5.
Examiner transmits at least 16 TS2 ordered sets with Reset bit asserted, followed by TWO
consecutive TS2 ordered sets with Reset bit de-asserted.
The test fails if the PUT does not transmit FOUR consecutive TS2 ordered sets
with Reset bit de-asserted or does not transmit Idle Symbols.
6.
Examiner transmits Sixteen Idle Symbols.
