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Link Layer Tests
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2.
Examiner software prompts the test operator to initiate a Hot Reset on the PUT through
USB30CV.
3.
Examiner waits for the PUT to send TS1s.
The test fails if TS1s are not sent by the PUT.
4.
When Examiner detects TS1s from the PUT, it starts the tHotResetTimeoutToWarmReset
timer. Examiner does not transmit anything in response to the PUT.
The value tHotResetTimeoutToWarmReset deadline is 12ms, but is given a
“calculated test time” expiration of 18.5ms. This calculated test time is
defined in the USB 3.0 Link Layer Test Specification, Section 4. Please
refer to that document for details.
The test fails if the PUT does not transmit a Warm Reset LFPS within
tHotResetTimeoutToWarmReset (12ms to 18.5ms).
5.
Examiner responds to the Warm Reset LFPS by entering Rx.Detect.
6.
Examiner and PUT perform the Link Initialization Sequence to bring Examiner and PUT link
to U0.
The test passes if the exchanges are correct, the Port Configuration
Transaction is correct, and the link remains in U0 for at least 50ms.
Specification Reference
Sections 7.4.2#6,#8,#14 ● 7.5.3.3.1#1 ● 7.5.10.3.2#5 ● 10.3.1.6#6
7.32
Deprecated
7.33
Exit Compliance Mode Test (Upstream Port Only)
Test Summary
This test verifies that a device exits Compliance Mode when it receives a Warm Reset LFPS.
Test Steps and Expected Results
1.
Examiner removes VBUS (to assure a PowerOn Reset).
2.
Examiner turns on VBUS, bringing the link to Rx.Detect.
