Embedded-logic PB945+, Manual

Page 1: ...embedded logic GmbH Telefon 49 0 8075 91 4400 Am Kroit 25 27 Fax 49 0 8075 91 4409 83123 Amerang email info embedded logic de Germany web www embedded logic de PB945 Manual rev 0 2 preliminary...

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Page 3: ...14 4 3 Memory 15 4 4 PC 104 Plus Bus 18 4 5 PCIe Interface 20 4 6 VGA 21 4 7 LCD 22 4 8 USB 1 to 4 LAN Sound 24 4 9 USB 5 and 6 LAN2 26 4 10 SATA Interfaces 27 4 11 IDE Interface 28 4 12 Parallel Int...

Page 4: ...P PCI Configuration 52 5 8 1 IRQ Resources 54 5 9 PC Health Status 55 5 10 Frequency Voltage Control 57 5 11 Load Fail Safe Defaults 58 5 12 Load Optimized Defaults 58 5 13 Set Password 58 5 14 Save E...

Page 5: ...mportant Notes Chapter History embedded logic PB945 page 5 0 History Version Changes 0 1 first preliminary release 0 2 adopted new name for form factor PCI 104 from www pc104 org updated block diagram...

Page 6: ...nor the unit you want to install this board on is energized before installation is completed o Please do not touch any devices or components on the board 1 2 Technical Support Technical support for t...

Page 7: ...arranty In such cases any material will be delivered free of charges If the unit needs to be transported for repair this will occur at sender s risk and expense Excluded from warranty services are o D...

Page 8: ...667 MEMORY Power VCCCore VTT DDRVTT 1 5V 1 8V 2 5V 3 3V Clock IDTCV111PAG BIOS MS IDE RealTek ALC655 MIC LINE OUT ACLink KB USB0 USB1 USB2 PC 104 Plus Slot1 LAN2 USB3 COM1 COM2 LPT FDC Watchdog Intel...

Page 9: ...BIOS 6 10 o CRT connection o TFT connection LVDS 18 24 36 48 Bit o AC97 compatible sound controller with SPDIF in and out o RTC with external CMOS battery o 5V single supply voltage o PCI bus via PC 1...

Page 10: ...fication Version 1 1 www pcisig com o ACPI specification Version 3 0 www acpi info o ATA ATAPI specification Version 7 Rev 1 www t13 org o USB specifications www usb org o SM Bus specification Version...

Page 11: ...Trade Marks Chapter Overview embedded logic PB945 page 11 2 3 Trade Marks All trade marks belong to their respective owners and are accepted...

Page 12: ...grees Celsius and accords highest possible security even in rough environment The processor includes a second level cache of up to 4 MByte depending on which model is used Furthermore the processors o...

Page 13: ...nly requires an operating voltage of 5 volt 5 it is not necessary to connect all indicated voltages Additional voltages may only be necessary for PC 104 Plus expansion cards For safety reasons it is r...

Page 14: ...pacing of 2 54 mm This connector supports the following interfaces PS 2 keyboard PS 2 mouse speaker external RTC battery hard disk LED and reset of the board Description Name Pin Name Description spea...

Page 15: ...ce current REF 1 2 GND ground ground GND 3 4 DQ4 data 4 data 0 DQ0 5 6 DQ5 data 5 data 1 DQ1 7 8 GND ground ground GND 9 10 DQM0 data mask 0 data strobe 0 DQS0 11 12 GND ground data strobe 0 DQS0 13 1...

Page 16: ...dress 3 A3 99 100 A12 address 2 address 1 A1 101 102 A0 address 0 1 8 volt supply 1 8V 103 104 1 8V 1 8 volt supply address 10 A10 105 106 BA1 SDRAM bank 1 SDRAM bank 0 BA0 107 108 RAS row address str...

Page 17: ...D 171 172 GND ground data 50 DQ50 173 174 DQ54 data 54 data 51 DQ51 175 176 DQ55 data 55 ground GND 177 178 GND ground data 56 DQ56 179 180 DQ60 data 60 data 57 DQ57 181 182 DQ61 data 61 ground GND 18...

Page 18: ...ly 3 3V A8 B8 CBE1 PCI com byte enable 1 PCI system error SERR A9 B9 GND ground ground GND A10 B10 PERR PCI parity error PCI stop stop A11 B11 3 3V 3 3 volt supply 3 3 volt supply 3 3V A12 B12 TRDY PC...

Page 19: ...GND ground ground GND C12 D12 DEVSEL PCI device select PCI initiator ready IRDY C13 D13 3 3V 3 3 volt supply 3 3 volt supply 3 3V C14 D14 CBE2 PCI com byte enable 2 PCI address data 17 AD17 C15 D15 GN...

Page 20: ...ET0 PCIe 0 transmit data PCIe slot 1 clock PECLK1 5 21 WAKE PCIe wake PCIe slot 1 clock PECLK1 6 22 PERST PCIe reset PCIe 1 receive data PER1 7 23 PET1 PCIe 1 transmit data PCIe 1 receive data PER1 8...

Page 21: ...ket connector with a spacing of 2 54 mm This interface allows the connection of a standard VGA monitor Description Name Pin Name Description analog red RED 1 2 GND ground analog green GREEN 3 4 DDDA D...

Page 22: ...sen over the BIOS setup Please contact your sales representative regarding an appropriate cable to connect your display The following table shows the pin description for the first bit even pixel Pin N...

Page 23: ...a 0 4 TXO10 LVDS odd data 0 5 TXO11 LVDS odd data 1 6 TXO11 LVDS odd data 1 7 TXO12 LVDS odd data 2 8 TXO12 LVDS odd data 2 9 TXO1C LVDS odd clock 10 TXO1C LVDS odd clock 11 TXO13 LVDS odd data 3 12 T...

Page 24: ...est Additionally on this plug one can also find signals for audio input and output There are two ways to use these signals Default functionality is the familiar audio in audio out and microphone OS de...

Page 25: ...logic PB945 page 25 Description Name Pin Name Description AUX input right rear output right AUXA_R REAR_R 27 28 AUXA_L REAR_L AUX input left rear output left microphone input 1 center output MIC1 CEN...

Page 26: ...e features enabled may lead to significant performance or functionality limitations Every USB interface provides up to 500 mA current and is protected by an electronical fuse The LAN interface support...

Page 27: ...available via two 7 pin connectors The required settings are made in the BIOS setup Pin Name Description 1 GND ground 2 SATA1TX SATA1 transmit 3 SATA1TX SATA1 transmit 4 GND ground 5 SATA1RX SATA1 re...

Page 28: ...4 9 10 PDD11 data bit 11 data bit 3 PDD3 11 12 PDD12 data bit 12 data bit 2 PDD2 13 14 PDD13 data bit 13 data bit 1 PDD1 15 16 PDD14 data bit 14 data bit 0 PDD0 17 18 PDD15 data bit 15 ground GND 19 2...

Page 29: ...py drive is connected with a special cable Please contact your sales representative for such a cable Description Name Pin Name Description strobe STB 1 2 AFD automatic line feed LPT data 0 PD0 3 4 ERR...

Page 30: ...g to the product order TTL level signals or RS232 standard signals are provided The port address and the interrupt are set via the BIOS setup Description Name Pin Name Description data carrier detect...

Page 31: ...g to the product order TTL level signals or RS232 standard signals are provided The port address and the interrupt are set via the BIOS setup Description Name Pin Name Description data carrier detect...

Page 32: ...es via the SMBus protocol The signals for these protocol are available through a standard IDC socket connector with a spacing of 2 54 mm Pin Name Description 1 3 3V 3 3 volt supply 2 CS SMB CLK SMBus...

Page 33: ...f the fan or of other devices connected over SMBus e g temperature sensor are accessible via an 8 pin connector JST BM08B SRSS TB mating connector SHR 08V S B Pin Name Description 1 3 3V 3 3 volt supp...

Page 34: ...5 10 and Load Optimized Defaults 5 11 5 2 Top Level Menu Phoenix AwardBIOS CMOS Setup Utility Standard CMOS Features Frequency Voltage Control Advanced BIOS Features Load Fail Safe Defaults Advanced C...

Page 35: ...PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults Date mm dd yy Options mm Monat dd Tag yy Jahr Time hh mm ss Options hh Stunden mm Minuten ss Sekun...

Page 36: ...ode Auto Capacity 0 MB Cylinder 0 Head 0 Precomp 0 Landing Zone 0 Sector 0 Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults IDE HD...

Page 37: ...Control For OS 1 4 OS Select For DRAM 64MB Non OS2 HDD S M A R T Capability Enabled Full Screen LOGO Show Disabled Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail S...

Page 38: ...tic Rate Setting Options Enabled Disabled Typematic Rate Chars Sec Options 6 8 10 12 15 20 24 30 Typematic Delay Msec Options 250 500 750 1000 Security Option Options Setup System APIC Mode Options En...

Page 39: ...tem Help Execute Disable Bit Enabled Virtualization Technology Enabled Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults Delay Prio...

Page 40: ...e Priority F10 Save ESC Exit F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults list of available devices Options this dialog allows you to set the order in which the available bootable de...

Page 41: ...Mode DVMT DVMT FIXED Memory Size 128MB Boot Display Auto Panel Scaling Auto Panel Number 640x480 Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Op...

Page 42: ...Auto On Chip Frame Buffer Size Options 1MB 8MB DVMT Mode Options FIXED DVMT BOTH DVMT FIXED Memory Size Options 64MB 128MB 224MB Boot Display Options Auto CRT TV EFP LFP Panel Scaling Options Auto On...

Page 43: ...PCI Express Port 3 Auto PCI Express Port 4 Auto PCI E Compliancy Mode v1 0a Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults PCI E...

Page 44: ...Chip IDE Device Press Enter Onboard Device Press Enter Item Help SuperIO Device Press Enter Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimize...

Page 45: ...s Secondary Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults IDE HDD Block Mode Options Enabled Disabled IDE DMA transfer access O...

Page 46: ...Chapter BIOS Settings Integrated Peripherals page 46 embedded logic PB945 SATA Port Options none...

Page 47: ...B Keyboard Support Disabled Azalia AC97 Audio Auto Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults USB Controller Options Enabled...

Page 48: ...Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults Onboard FDC Controller Options Enabled Disabled Onboard Serial Port 1 Options Disabled 3F8 I...

Page 49: ...Integrated Peripherals Chapter BIOS Settings embedded logic PB945 page 49 ECP Mode Use DMA Options 1 3...

Page 50: ...abled x Date of Month Alarm 0 x Time hh mm ss 0 0 0 Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults ACPI function Options Enabled...

Page 51: ...tions Enabled Disabled Date of Month Alarm Options 1 31 Time hh mm ss Alarm Options hh mm und ss eintragen Primary IDE 0 Options Enabled Disabled Primary IDE 1 Options Enabled Disabled Secondary IDE 0...

Page 52: ...ive items Maximum Payload Size 128 Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults Init Display First Options PCI Slot Onboard Re...

Page 53: ...hapter BIOS Settings embedded logic PB945 page 53 INT Pin 7 Assignment Options Auto 3 4 5 7 9 10 11 12 14 15 INT Pin 8 Assignment Options Auto 3 4 5 7 9 10 11 12 14 15 Maximum Payload Size Options 128...

Page 54: ...ce IRQ 15 assigned to PCI Device Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults IRQ 3 assigned to Options PCI Device Reserved IR...

Page 55: ...65V Fan1 Speed 12500 RPM Fan2 Speed 0 RPM Fan3 Speed 0 RPM Board Revision 0 Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults Shutd...

Page 56: ...Chapter BIOS Settings PC Health Status page 56 embedded logic PB945 Fan3 Speed Options none Board Revision Options none...

Page 57: ...MOS Setup Utility Frequency Voltage Control Auto Detect PCI Clk Enabled Spread Spectrum 0 25 Item Help Move Enter Select PU PD Value F10 Save ESC Exit F1 Help F5 Previous Values F6 Fail Safe Defaults...

Page 58: ...ameters 5 12 Load Optimized Defaults This option applies like described under Remarks for Setup Use 5 1 At first start of the BIOS optimized values are loaded from the setup which are supposed to make...

Page 59: ...rogram AWDFLASH EXE of the company Phoenix is used to update the BIOS It is important that the program is started from a DOS environment without a virtual memory manager such as for example EMM386 EXE...

Page 60: ...Drawing PCB Mounting Holes page 60 embedded logic PB945 7 Mechanical Drawing 7 1 PCB Mounting Holes A true dimensioned drawing can be found in the PC 104 specification Attention All dimensions are in...

Page 61: ...PCB Pin 1 Dimensions Chapter Mechanical Drawing embedded logic PB945 page 61 7 2 PCB Pin 1 Dimensions Attention All dimensions are in mil 1 mil 0 0254 mm...

Page 62: ...Chapter Mechanical Drawing PCB Heat Sink page 62 embedded logic PB945 7 3 PCB Heat Sink Attention All dimensions are in mil 1 mil 0 0254 mm...

Page 63: ...wice as much and should by used as a basis for the cooling concept Additional controllers may also affect the cooling concept The power consumption of such components may be comparable to the consumpt...

Page 64: ...etended the hardware interrupts will point on SPURIOUS_INT_HDLR and the software interrupts will point on SPURIOUS_soft_HDLR 1Dh Initialise Variable Routine EARLY_PM_INIT 1Fh Load the keyboard table N...

Page 65: ...ory for function call INT 15h with AX Reg E820h 69h Enable level 2 cache 6Bh Programming of the chip set register according to the BIOS set up and auto detection table 6Dh 1 Assignment of resources fo...

Page 66: ...er time 2 Update settings of keyboard LED and keyboard repeat rates 96h 1 Multi processor system generate MP table 2 Generate and update ESCD table 3 Correct century settings in the CMOS 20xx or 19xx...