Rev.1.1
EPSON
i
CONTENTS
1. DESCRIPTION....................................................................................................................................1
2. FEATURES .........................................................................................................................................1
3. BLOCK DIAGRAM .............................................................................................................................2
4. PIN ASSIGNMENT .............................................................................................................................3
5. PIN DESCRIPTION.............................................................................................................................4
6. FUNCTIONAL DESCRIPTION ...........................................................................................................6
6.1 CPU Interface Circuit..................................................................................................................6
6.2 Internal Registers........................................................................................................................6
6.3 Port Interface Circuit...................................................................................................................6
6.4 DMA Control Circuit....................................................................................................................6
6.5 SCSI-2 Interface Circuit..............................................................................................................6
6.6 PLL Circuit (Internal System Clock Generating Section) ...........................................................7
7. FUNCTION OF REGISTERS..............................................................................................................8
7.1 List of Registers ..........................................................................................................................8
7.2 List of Registers/Bits...................................................................................................................9
7.3 Detailed Description of Each Register......................................................................................10
7.3.1 Main Interrupt Status (MAININT) R/W.......................................................................10
7.3.2 SCSI Interrupt Status 1 (SCSIINT1) R/W.................................................................. 11
7.3.3 SCSI Interrupt Status 2 (SCSIINT2) R/W..................................................................12
7.3.4 Reset (RESET) W......................................................................................................12
7.3.5 SCSI Mode Select0 (SCSIMODE0) R/W ..................................................................13
7.3.6 SCSI Mode Select1 (SCSIMODE1) R/W ..................................................................14
7.3.7 SCSI Control (SCSICTL) R/W ...................................................................................14
7.3.8 SCSI Data (SCSIDATA) R/W.....................................................................................15
7.3.9 Synchronize Transfer Mode (SYNCMODE) R/W ......................................................15
7.3.10 SCSI Own ID (OWNID) R/W ...................................................................................16
7.3.11 Source/Destination ID (SDID) R/W..........................................................................16
7.3.12 Selection Timeout Counter (SLTIME) R/W..............................................................16
7.3.13 FIFO Control (FIFOCTL) R/W .................................................................................16
7.3.14 FIFO Data (FIFODATA) R/W ...................................................................................17
7.3.15 Non DMA Transfer Size (NDMASIZ) R/W ...............................................................17
7.3.16 SCSI Command (COMMAND) R/W ........................................................................17
7.3.17 DMA Control (DMACTL) R/W..................................................................................17
7.3.18 DMA Transfer Byte Count 2 (DTBC2) R/W .............................................................17
7.3.19 DMA Transfer Byte Count 1 (DTBC1) R/W .............................................................17
7.3.20 DMA Transfer Byte Count 0 (DTBC0) R/W .............................................................18
7.3.21 CONFIG0 (CONFIG0) R/W .....................................................................................18
7.3.22 CONFIG1 (CONFIG1) R/W .....................................................................................19
7.3.23 Test (TEST) R(/W) ...................................................................................................20
7.3.24 Revision Reg. (REVISION) R ..................................................................................20
7.4 SCSI Control Commands .........................................................................................................20
7.4.1 Control Commands and Command Codes ..................................................................20
7.4.2 Description of Each Control Command........................................................................21
7.4.3 Command Execution and State Transition ..................................................................28
