Epson S1R72U16, Support Manual

Page 1: ...S1R72U16 Development Support Manual Rev 2 00 ...

Page 2: ...Moreover no license to any intellectual property rights is granted by implication or otherwise and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Ex...

Page 3: ...Scope This document applies to the S1R72U16 IDE device USB 2 0 host bridge LSI ...

Page 4: ... Function Menu 5 3 3 1 Show Diagnostic Data 5 3 3 2 Clear Historical Data 5 3 3 3 Quit 5 4 History Data Details 6 4 1 IDE History Data 6 4 1 1 IDE idle 6 4 1 2 IDE Hardware reset 6 4 1 3 IDE SRST 7 4 1 4 IDE command xxh 7 4 1 5 IDE PIO D H 7 4 1 6 IDE PIO H D 7 4 1 7 IDE Multi Word DMA D H 7 4 1 8 IDE Multi Word DMA H D 8 4 1 9 IDE Ultra DMA D H 8 4 1 10 IDE Ultra DMA H D 8 4 1 11 IDE CRC error 8 ...

Page 5: ...B Data IN 10 4 2 12 USB Data OUT 10 4 2 13 USB CSW 10 4 2 14 USB cleared STALL 11 4 2 15 USB Mass Storage Reset 11 4 3 Connection Verification Methods 12 4 3 1 Main CPU and LSI Connection Verification Method 12 4 3 2 USB Device and LSI Connection Verification Method 13 4 3 3 Potential Communication Problems with USB Devices 15 Appendix A Correspondence between Pins and ATA ATAPI Standard Signals 1...

Page 6: ...part of certification testing For detailed information refer to the S1R72U16 Embedded Host Compliance Guide Note the following precautions for history information HS devices connected via an FS USB hub will be recognized as FS devices not HS devices Only Bulk Only Transport Mass Storage Class devices are supported UFI subclass SubClassCode value is 04h devices are unsupported CBI Transport devices...

Page 7: ...are controlled by the control PC Control PC PC used to control these functions via terminal software using the RS 232 interface function USB device A USB device such as USB memory HDD CD DVD or MO drive Connect when using the IDE USB bridge Not required if only checking initializing the connection between the LSI and main CPU Table 2 1 shows RS 232 and terminal software settings Table 2 1 RS 232 a...

Page 8: ...e the PLL_Locked pin Port13 switches to High Confirm that the signal is at High before starting these functions i e before entering menu Consider the following possible causes if the PLL_Locked pin Port13 fails to switch to High The specified power supply is not provided to the LSI The LSI reset pin XRESET is still at Low S1R72U16 Development EPSON 3 Support Manual Rev 2 00 ...

Page 9: ... functions by entering menu via the PC terminal software This will display the items shown in Table 3 1 Table 3 1 Main menu list Key Input Item Summary 1 USB analog test Allows switching to Test mode 2 Diagnostic Starts the history display function q Quit Quits the function 3 2 1 USB Analog Test When key input 1 is received then the operation menu is displayed and to allow switching to Test mode F...

Page 10: ...ory data is displayed Then the menu shown in Table 3 2 History data includes both USB and IDE related data and is displayed in chronological order starting with the oldest Up to 63 messages can be displayed Tables 4 1 and 4 2 show the display details 3 3 2 Clear Historical Data When key input 2 is received recorded history data is all cleared Then the menu shown in Table 3 2 History data recording...

Page 11: ...ce IDE Ultra DMA D H Transferred Ultra DMA data from device to host IDE Ultra DMA H D Transferred Ultra DMA data from host to device IDE CRC error Detected CRC error during Ultra DMA data transfer IDE INTRQ Asserted INTRQ 4 1 1 IDE idle This history entry is recorded when in a state that allows commands to be received from the main CPU when the Status register BSY bit and DRQ bit are both 0 corres...

Page 12: ...nal connections shown below CS0 CS1 DA0 to DA2 DD0 to DD7 DIOW 4 1 5 IDE PIO D H This history entry is recorded when PIO format data transfer starts If IDE INTRQ or IDE idle does not appear after the history entry there may be a problem with signal quality or in the signal connections shown below CS0 CS1 DA0 to DA2 DIOW DIOR If data is incorrect there may be a problem with signal quality or in the...

Page 13: ...signal quality or in the signal connections shown below DD0 to DD15 4 1 12 IDE INTRQ This history entry is recorded in spite of the Device Control register nIEN bit when the command issued by the main CPU has finished executing and the status register details have been updated If the main CPU cannot detect INTRQ even when this history entry appears while the Device Control register nIEN bit is 0 t...

Page 14: ...Issued request to clear STALL USB Mass Storage Reset Issued Mass Storage Reset specified device reset 4 2 1 USB VBUS Overcurrent This history entry is recorded when an overcurrent is detected in the VBUS If this history entry appears when an USB device is connected the current drawn from the VBUS by the USB device may exceed the supply capacity 4 2 2 USB LS device This history entry is recorded wh...

Page 15: ...e 4 2 10 USB CBW This history entry is recorded when a command issuing CBW is issued as defined for Mass Storage Class 4 2 11 USB Data IN This history entry is recorded when Bulk IN is issued at the start of the data transfer USB device to USB host for a command issued using CBW A single history entry is recorded for the entire data stream rather than for individual packets 4 2 12 USB Data OUT Thi...

Page 16: ...rded when the LSI requests the clearing of issuing request to clear the STALL after returnning STALL from a device 4 2 15 USB Mass Storage Reset This history entry is recorded when Mass Storage Reset is issued to a device S1R72U16 Development EPSON 11 Support Manual Rev 2 00 ...

Page 17: ...he signals used for PIO transfer can be checked simultaneously using Multi Word DMA transfer Set the Device Control register nIEN bit to 0 when issuing commands Method for confirming CS0 CS1 DA0 to DA2 DIOW DIOR INTRQ and DD0 to DD15 signals When using PIO transfer only Confirm by issuing a command from the main CPU and by using PIO transfer 1 Issue the SET FEATURE command and set PIO transfer 2 I...

Page 18: ...A command against the data read by the READ DMA command Confirm that they match This enables evaluation of the DD0 to DD15 signals In ATAPI mode issue the WRITE command instead of the WRITE DMA command and the READ command instead of the READ DMA command Method for confirming CS0 CS1 DA0 to DA2 DIOW DIOR INTRQ DMARQ DMACK IORDY and DD0 to DD15 signals When using Ultra DMA transfer Confirm by issui...

Page 19: ... the history if the USB device connected is an unsupported device If not there may be a problem with signal quality Checking USB hub operation 1 Connect a USB hub to the LSI Confirm that USB VBUS overcurrent does not appear in the history Otherwise there may be a problem in the VBUS supply control circuit 2 Confirm that USB FS device or USB HS device appears in the history and matches the speed mo...

Page 20: ...uld be issued by the main CPU USB CBW appears in the history but USB CSW does not with no status changes USB Mass Storage Reset or USB cleared STALL appears at the end of the history without any subsequent changes If the following combinations appear in the history data there may be a conflict in the protocol between the USB host and the device In this case since an error status is returned to the...

Page 21: ..._T CA3 CS0 J6 33 XHIOR_T XRD DIOR G5 31 XHIOW_T XWR DIOW H5 30 HDMARQ_T XDREQ DMARQ J5 29 XHDMACK_T XDACK DMACK H6 32 HIORDY_T IORDY F5 28 HINTRQ_T XINT INTRQ E9 48 XHRESET_T XHRESET RESET E8 47 XHDASP_T DASP F7 46 XHPDIAG_T PDIAG F9 45 CSEL_T CSEL CSEL D7 55 HDD15_T CD15 DD15 C9 56 HDD14_T CD14 DD14 C8 57 HDD13_T CD13 DD13 C7 58 HDD12_T CD12 DD12 B8 59 HDD11_T CD11 DD11 A8 61 HDD10_T CD10 DD10 B7...

Page 22: ... 00 1 Add Added subclass details to history information precautions 6 Add Added DRQ bit conditions to states allowing receipt of commands in Section 4 1 1 8 Correct Corrected details for Section 4 1 12 15 Correct Corrected details for Section 4 3 3 04 01 2008 2 00 4 5 7 8 Correct Corrected details for Section 3 2 3 3 4 1 5 to 4 1 10 ...

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