4. CPUIF Verification Procedure
12
EPSON
S1R72V17 CPU Connection Guide
(Rev. 1.0)
6) Clock input setting
Write the clock input setting value to the ClkSelect register (0x73h address).
This sets the clock input method and frequency used for the S1R72V17. The settings are shown in Table
4-2.
Table 4-2 ClkSelect register settings
Clock input method
Clock frequency
External oscillator
External clock source
12 MHz
0x00
0x80
24 MHz
0x01
0x81
48 MHz
Not available
0x83
7) Clock input setting protect
Write 0x00 to the ModeProtect register (0x071 address).
Writing a value other than 0x56 to this register enables write protection for the ClkSelect register.
8) MTM
reset
Write 0x00 to the ChipReset register (0x011 address).
Clearing the bit7 ResetMTM bit to “0” clears the USB Transceiver Macro reset and enables oscillation
of the PLL contained in the S1R72V17.
9) Oscillation start time setting
Write the oscillation start time to the WakeupTim_H,L registers (0x014 address).
With external clock source:
Write 0x0010. Note that the external clock source oscillation must have stabilized before this occurs.
With external oscillator:
The standard time is usually within the clock frequency ±10%, but this will vary greatly, depending
on the selected oscillator, circuit board, and external components. Write 0x2500 here to check the
connection.
10) Internal clock feed setting
Write 0x40 to the PM_Control register (0x012 address).
Setting the bit6 GoActive bit to “1” starts the internal clock operation (starts OSC and PLL) and starts
the clock feed to the internal circuit.
