ITX-E8 User`s Manual
53
DRAM Clock/Drive Control
Phoenix – AwardBIOS CMOS Setup Utility
DRAM Clock/Drive Control
Current FSB Frequency 100MHZ
Current DRAM Frequency 200MHZ
DRAM Clock [By SPD]
DRAM Timing [Auto By SPD]
X SDRAM CAS Latency [DDR/DDR 2.5/ 4
X Bank Interleave Disabled
X Precharge to Active (Trp) 2T
X Active to Precharge (Tras) 05T
X Active to CMD (Trcd) 4T
X REF to ACT/REF (Trfc) 21T
X ACT (0) to ACT (1) (TRRD) 3T
Item Help
Menu Level
↑↓→←
: Move Enter: /-/PU/PD: Value F10:Save ESC: Exit F1:General Help
F5:Previous Values F6:Fail-safe Defaults F7:Optimized Defaults
Current FSB Frequency
The choice: 100MHz.
Current DRAM Frequency
The choice: 200MHz.
DRAM Clock
The choice: By SPD, 100MHz, 133MHz, 166MHz, 200MHz.
DRAM Timing
The choice: Manual, Auto By SPD.
SDRAM CAS Latency [DDR/DDR
The choice: 2.5/ 4.
Bank Interleave
The choice: Disabled.
Summary of Contents for ITX-E8
Page 1: ...I IT TX X E E8 8 INDUSTRIAL MOTHERBOARD User s Manual Version 1 0...
Page 10: ...2 ITX E8 User s Manual Chapter 1 Features Specifications Features 3 Specifications 4...
Page 16: ...8 ITX E8 User s Manual This page is intentionally left blank...
Page 19: ...ITX E8 User s Manual 11 Jumper Locations on the ITX E8...
Page 25: ...ITX E8 User s Manual 17 Connector Locations on the ITX E8 1 2...