PI-P5BVLL User`s Manual
49
DRAM Timing Selectable
The choice: Manual, By SPD
(default)
.
If DRAM Timing Selectable is [Manual], can choice these Items:
►
CAS Latency Time.
►
Dram RAS# to CAS# Delay.
►
DRAM RAS# Precharge.
►
Precharge dealy (tRAS).
►
System Memory Frequency.
CAS Latency Time
This controls the latency between DDR RAM read command and the
time that the data actually becomes available.
Leave this on the default setting.
The choice: 5, 4, 3, 6, Auto
(default)
.
DRAM RAS# to CAS# Delay
In order to improve performance, certain space in memory is
reserved for PISA cards.
This memory must be mapped into the memory space below 16MB.
The choice: 2, 3, 4, 5, 6, Auto
(default)
.
DRAM RAS# Precharge
This controls the idle clocks after issuing a precharge command to
DRAM.
Leave this on the default setting.
The choice: Auto
(default)
, 2, 3,4,5,6.
Precharge dealy (tRAS)
The choice: Auto
(default)
, 4,5,6,7,8,9,10,11,12,13,14,15.
System Memory Frequency
The choice: Auto
(default)
, 533MHz, 667MHz.
System BIOS Cacheable
The choice: Enabled
(default)
, Disabled.
Summary of Contents for PI-P5BVLL
Page 1: ...PI P5BVLL Intel Core 2Quad Q35 PICMG 1 0 SBC User s Manual Version 1 0...
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Page 10: ...2 PI P5BVLL User s Manual Chapter 1 Features Specifications FEATURES 3 SPECIFICATIONS 4...
Page 17: ...PI P5BVLL User s Manual 9 Jumper Locations on the PI P5BVLL...
Page 22: ...14 PI P5BVLL User s Manual Connector Locations on the PI P5BVLL...
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