EVOC EC5-1812CLDNA(B), Manual

Page 1: ...EC5 1812CLDNA B 5 25 Single Board Computer Version C00 ...

Page 2: ... motherboard read the instructions and safety guidelines on the following pages to prevent damage to the product and to ensure your own personal safety 2 Any boards or cards not ready to be installed shall be kept in the anti static packaging 3 Before taking board or card from anti static packaging put your hand on grounded metal object for a while about 10 seconds to eliminate static on your body...

Page 3: ... 2 CPU 2 Chipset 2 System Memory 2 LAN 2 IDE Function 2 Video Function 2 Audio Function 3 I O Function 3 Expansion Bus 3 Watchdog Function 3 Chapter 2 Installation 4 Product Outline 4 The Locations of Interfaces 5 Jumper Settings 6 SATA Interface 7 Hot swap of SATA Hard Disk 7 USB Interface 9 Serial Ports 10 ...

Page 4: ...ot 14 PCIE X1 Slots 15 Audio Interface 15 Fan Interface 16 Power Interface 16 Digital I O Interface 16 Status Indicator Interface 17 Chapter 3 BIOS Setup 18 Appendix 19 Watchdog Programming Guide 19 GPIO Programming Guide 23 I O Address Map 28 IRQ Assignment Table 29 ...

Page 5: ... PCI expansion interfaces The motherboard adopts 5 25 single board structure which could meet the requirement of industry eager for miniaturization such as face recognition terminal advertisement player off line IC card intelligent consumption system portable PC and so on The product could be widely used to configure intranet extranet demilitarized zone and network controlling port to meet increas...

Page 6: ...or Intel Atom Processor N270 512K Cache 1 60 GHz 533 MHz FSB CPU Chipset Intel 945GC Intel ICH7 System Memory Support DDRⅡ 533MHz memory on board 1GB memory LAN On board one 10 100 1000Mbps Ethernet controller IDE Function One Compact Flash interface two SATA interfaces Video Function Integrate inside Intel 945GC system support VGA interface realize VGA LVDS dual display via SDVO LVDS chip and LVD...

Page 7: ...ort support SPP EPP ECP standard Six USB2 0 interfaces Four RS 232 interfaces among which COM1 COM2 could support RS 422 RS 485 mode One 8 lane digital IO Interface 4I 4O Expansion Bus One PCI slot one PCIE X1 slot PCI slot could be used independently or to expand 3 PCI devices via PCI transfer card Watchdog Function 255 levels programmable per second Overtime interrupt or system reset ...

Page 8: ...Chapter 2 Installation 4 EC5 1812CLDNA B Chapter 2 Installation Product Outline 146 1 203 2 193 5 1 135 9 5 1 Unit mm ...

Page 9: ...812CLDNA B 5 The Locations of Interfaces PCI1 PCIE1 AUDIO1 LAN1 FP1 FP3 FP2 JCC1 JCF1 CF1 LPT1 SYSFAN1 PWR1 LVDS2 LVDS1 GPIO1 USB1 USB2 USB3 VGA1 SATA1 SATA2 JLCD1 LCDB1 COM2 COM4 COM1 COM3 JP10 JP9 JP8 JP7 JP6 JP5 JP4 JP3 JP2 JP1 ...

Page 10: ...e computer load optimized defaults 5 Save and exit setup mode JCC1 Setup Function 1 2 Open Normal Default 1 2 Short Clear the content of CMOS all the BIOS setting resume to factory default value 2 CF Card Voltage Selection JCF1 Setup Function 1 2 Short 3 3V Default 2 3 Short 5V 3 LCD Operating Voltage Selection JLCD1 Setup Function 1 2 Short 3 3V Default 2 3 Short 5V 4 Serial Ports RS232 RS422 RS4...

Page 11: ...5 JP10 1 2 2 3 2 3 SATA Interface SATA1 SATA2 Pin Signal Name 1 GND 2 TX 3 TX 4 GND 5 RX 6 RX 7 GND Hot swap of SATA Hard Disk Notice for hot swap of SATA hard disk 1 The hard disk shall support SATA 2 0 and use 15 pin SATA hard disk power 2 The driver of chipset shall support the hot swap SATA hard disk 3 Hot swap of SATA hard disk with operating system in is forbidden when system is power on ...

Page 12: ...the hard disk or result in data lost Hot Plug Step1 Please plug the 1 x 4 pin SATA power cable white into the power adapter Step2 Please connect the SATA data cable to the SATA interface of main board Step3 Please connect the 15 pin SATA power cable black to the SATA hard disk SATA Data Cable SATA Power Cable ...

Page 13: ...p2 Unplug the data cable from the SATA hard disk Step3 Unplug the SATA 15 pin power cable black from the SATA hard disk USB Interface This motherboard provides USB interfaces in three sets which could be connected with 6 standard USB devices USB1 USB3 Pin Signal Name Pin Signal Name 1 5V 2 5V 3 USB1_Data 4 USB2_Data 5 USB1_Data 6 USB2_Data 7 GND 8 GND 9 NC 10 GND_CHASSIS ...

Page 14: ... transfer cable to connect with peripheral equipment COM1 and COM2 support optional RS 232 RS 422 RS 485 COM3 and COM4 support RS 232 mode COM1 COM2 Pin Signal Name RS 232 RS 422 RS 485 1 DCD TXD Data 2 RXD TXD Data 3 TXD RXD X 4 DTR RXD X 5 GND GND GND 6 DSR X X 7 RTS X X 8 CTS X X 9 RI X X 10 NC NC NC COM3 COM4 Pin Signal Name 1 DCD 2 RXD 3 TXD 4 DTR 5 GND 6 DSR 7 RTS 8 CTS 9 RI 10 NC ...

Page 15: ...15 PD6 16 GND 17 PD7 18 GND 19 ACK 20 GND 21 BUSY 22 GND 23 PE 24 GND 25 SLCT 26 NC LAN Port Provide one on board 10 100 1000M LAN port It is a 2 7 pin interface which requires transfer cable to fix the interface onto the chassis and then connect with peripheral equipment The pin arrangement and its corresponding input socket are showed as follows LAN1 Pin Signal Name Pin Signal Name 1 MX0 2 MX0 3...

Page 16: ...ND 10 GND 2 24 bit Dual scan LVDS Interface LVDS1 Pin Signal Name Pin Signal Name 1 LVDSO_D0 2 LVDSO_D0 3 GND 4 GND 5 LVDSO_D1 6 LVDSO_D1 7 GND 8 GND 9 LVDSO_D2 10 LVDSO_D2 11 GND 12 GND 13 LVDSO_CLK 14 LVDSO_CLK 15 GND 16 GND 17 LVDSO_D3 18 LVDSO_D3 19 VDD 20 VDD LVDS2 Pin Signal Name Pin Signal Name 1 LVDSE_D0 2 LVDSE_D0 3 GND 4 GND 5 LVDSE_D1 6 LVDSE_D1 7 GND 8 GND 9 LVDSE_D2 10 LVDSE_D2 11 GND...

Page 17: ...ly be inserted in one direction Pin Signal Name Pin Signal Name 1 GND 26 CD1 2 D3 27 D11 3 D4 28 D12 4 D5 29 D13 5 D6 30 D14 6 D7 31 D15 7 CS0 32 CS1 8 GND 33 VS1 9 ATASEL 34 IOR 10 GND 35 IOW 11 GND 36 WE 12 GND 37 IRQ 13 VCC 38 VCC 14 GND 39 CSEL 15 GND 40 VS2 16 GND 41 RESET 17 GND 42 IORDY 18 A2 43 DREQ 19 A1 44 DACK 20 A0 45 DASP 21 D0 46 ATA66_DET 22 D1 47 D8 23 D2 48 D9 24 WP IOCS16 49 D10 ...

Page 18: ...2 PCI_SERR A13 GND A43 PCI_PAR B13 GND B43 3 3V A14 PCI_GNT1 A44 PCI_AD15 B14 CLK_PCI0 B44 PCI_C BE 1 A15 PCI_RST A45 3 3V B15 GND B45 PCI_AD14 A16 5V A46 PCI_AD13 B16 CLK_PCI1 B46 GND A17 PCI_GNT0 A47 PCI_AD11 B17 GND B47 PCI_AD12 A18 GND A48 GND B18 PCI_REQ0 B48 PCI_AD10 A19 PCI_REQ2 A49 PCI_AD9 B19 5V B49 GND A20 PCI_AD30 A50 PCI_C BE 0 B20 PCI_AD31 B50 PCI_AD8 A21 3 3V A51 3 3V B21 PCI_AD29 B5...

Page 19: ...TCK B6 SMDAT A6 TDI B7 GND A7 TDO B8 3 3V A8 TMS B9 TRST A9 3 3V B10 3 3Vaux A10 3 3V B11 WAKE A11 PWRGD B12 RSVD A12 GND B13 GND A13 REFCLK B14 PETp0 A14 REFCLK B15 PETn0 A15 GND B16 GND A16 PERp0 B17 PRSNT2 A17 PERn0 B18 GND A18 GND Audio Interface AUDIO1 Pin Signal Name Pin Signal Name 1 LOUT_R 2 LOUT_L 3 GND_AUDIO 4 GND_AUDIO 5 LIN_R 6 LIN_L 7 GND_AUDIO 8 GND_AUDIO 9 MIC_L 10 MIC_R ...

Page 20: ...recommended to use a fan with rev speed detection Adjust the fan s airflow to the direction of heat venting SYSFAN1 Pin Signal Name 1 GND 2 12V 3 FAN_IO 4 FAN_PWM FAN_IO fan rev impulse output FAN_PWM fan rev PWM control Power Interface 10 PIN ATX power interface PWR1 Pin Signal Name Pin Signal Name 1 PS_ON 6 5VSB 2 GND 7 5V 3 GND 8 5V 4 12V 9 12V 5 3 3V 10 GND Digital I O Interface Provide with 4...

Page 21: ... 6 IDE_LED 2 Power Indicator Interface FP2 Pin Signal Name 1 PWR_LED 2 NC 3 GND 3 Loudspeaker Indicator Interface FP3 Pin Signal Name 1 SPEAKER 2 NC 3 GND 4 5V 4 LCD Backlight Control Connector LCDB1 管脚 信号名称 1 VCC_LCDBKLT 2 NC 3 LCD_BKLTEN 4 GND Note VCC_LCDBKLT backlight power Provides 12V voltage and the current of the pin is limited below 1A LCD_BKLTEN backlight enable active high ...

Page 22: ...Chapter 3 BIOS Setup 18 EC5 1812CLDNA B Chapter 3 BIOS Setup Regarding the BIOS features setup of EC5 1812CLDNA please refer to the AMI BIOS Setup Guide edited by EVOC Company ...

Page 23: ...on exit WDT The steps to program WDT Enter WDT programming mode Setup WDT operating methods enable WDT disable WDT Exit WDT programming mode The following files shall be included include stdio h include dos h include bios h include stdlib h include string h 1 Enter WDT programming Mode and obtain pm BASE The watchdog setup is within pm_base offset register outportb 0x2e 0x55 enter WDT programming ...

Page 24: ...ortb 0x2e 0x61 reg61 get low base from this register base_addr inportb 0x2f and save to global VAR pm_Base pm_base pm_base 8 pm_base pm_base base_addr define WRITEREG reg val tmp_reg pm_base reg outportb tmp_reg val 2 Setup WDT operating mode reset mode or interrupt mode a Reset Operating Mode WRITEREG 0x47 0x0c pm_base offset 0x47 register 0x47 bit 0 in out 1 input 0 output bit 1 polarity 1 inver...

Page 25: ...0x80 pm_base offset 0x47 WRITEREG 0x67 irq pm_base offset 0x47 register 0x67 bit 7 4 WDT interrupt Mapping 1111 IRQ 15 0011 IRQ3 0010 IRQ2 0001 IRQ1 0000 Disable Among which IRQ_RESOURCE 0 any interrupt is forbidden 3 WDT timer selection minute or second a Select to time by minute with the following words suppose it is under WDT programming mode WRITEREG 0x65 0 ...

Page 26: ...nder WDT programming mode WRITEREG 0x65 0x80 4 Enable Disable WDT suppose it is under WDT programming mode WRITEREG 0x66 TIME OUT VALUE pm_base offset 0x66 write in preset time TIME OUT VALUE Note the range of TIME OUT VALUE is from 1 to 255 the unit is second or minute If TIME OUT VALUE is zero WDT is disabled Start WDT when TIME OUT VALUE is non zero value only 5 Exit WDT Programming Mode Outpor...

Page 27: ...I O ports programming mode The programming steps are as follows Enter digital I O ports programming mode Implement input output operation for digital I O port Exit digital I O ports programming mode Please refer to the following code for digital I O port programming unsigned long _pascal in_32 unsigned int io_port unsigned long ReturnValue _asm mov dx io_port in eax dx mov ReturnValue eax return R...

Page 28: ...dr long data long pci_data out_32 0xCF8 addr out_32 0xcfc data return pci_data long addr_pci 0x8000F848 long io_base read_pci addr_pci 0x0000fffe Bus 0 Dev 1F Fun 0 Reg 48 Dword Reg get Base Address unsigned int addr_statue io_base 0x1a outportb addr_statue 0x00 addr_statue io_base 0x1b outportb addr_statue 0x00 base offset 1ah 1bh GPIO Blink ...

Page 29: ... base offset2h GPIO Use Select Register bit 0 1 bit 2 1 selset GP16 GP18 as GPIO addr_select io_base 0x03 unsigned int get_2x inportb addr_select 0x1c outportb addr_select get_2x base offset3h GPIO Use Select Register bit 4 2 111 selset GP28 GP26 as GPIO addr_select io_base 0x30 unsigned int get_3x inportb addr_select 0xc2 outportb addr_select get_3x base offset30h GPIO Use ...

Page 30: ...utportb addr_select2 get_0 base offset6h GPIO IN OUT Select Register bit 0 0 bit 2 1 selset GP18 as input GP16 as output addr_select2 io_base 0x07 unsigned int get_2 inportb addr_select2 0xe3 outportb addr_select2 get_2 base offset7h GPIO IN OUT Select Register bit 4 2 000 selset GP28 GP26 as output addr_select2 io_base 0x34 unsigned int get_3 inportb addr_select2 0xc2 outportb addr_select2 get_3 ...

Page 31: ...put base unsigned int num_1 inportb addr_o1 0xfe outportb addr_o1 num_1 unsigned int num_2 inportb addr_o2 0xe3 outportb addr_o2 num_2 Set the output pin as low level short circuit I O pins and then measure the voltage on input pin If the voltage value on the input pin is low then IO digtial is normal otherwise it is abnormal Users may also set the output pin as high level by the same way Short ci...

Page 32: ...r 040h 043h Timer 061h System Loudspeaker 070h 071h Real Time Clock 081h 083h DMA Controller 087h DMA Controller 089h 08Bh DMA Controller 08Fh DMA Controller 0A0h 0A1h Interrupt Controller 0C0h 0DFh DMA Controller 0F0h 0FFh Data Processor 170h 177h Slave IDE 1F0h 1F7h Master IDE 200h 207h Communication Port COM3 208h 20Fh Communication Port COM4 274h 277h ISAPNP Data Reading Port 279h ISAPNP Data ...

Page 33: ...he ISA devices claim to engross the interrupt Only the plug and play ISA devices can be distributed by the BIOS or the OS PCI devices use APIC interrupt and are distributed by OS The diagram below shows the interrupt distribution compatible with ISA Level Function IRQ0 System Timer IRQ3 Serial Port 3 4 IRQ4 Serial Port 1 2 IRQ8 System CMOS Real Time Clock IRQ9 ACPI Adaptation System IRQ13 Numeric ...

Page 34: ...8 版权所有 违者必究 未经许可 不得 以机械 电子或其它任何方式进行复制 安全使用小常识 1 产品使用前 务必仔细阅读产品说明书 2 对未准备安装的板卡 应将其保存在防静电保护袋中 3 在从防静电保护袋中拿出板卡前 应将手先置于接地金属物体上一会儿 比 如 10 秒钟 以释放身体及手中的静电 4 在拿板卡时 需佩戴静电保护手套 并且应该养成只触及其边缘部分的习 惯 5 为避免人体被电击或产品被损坏 在每次对主板 板卡进行拔插或重新配 置时 须先关闭交流电源或将交流电源线从电源插座中拔掉 6 在需对板卡或整机进行搬动前 务必先将交流电源线从电源插座中拔掉 7 对整机产品 需增加 减少板卡时 务必先拔掉交流电源 8 当您需连接或拔除任何设备前 须确定所有的电源线事先已被拔掉 9 为避免频繁开关机对产品造成不必要的损伤 关机后 应至少等待 30 秒后 再开机 ...

Page 35: ...目 录 第一章 产品介绍 1 简介 1 环境与机械尺寸 1 典型功耗 2 微处理器 2 芯片组 2 系统存储器 2 网络功能 2 IDE 功能 2 显示功能 3 音频功能 3 I O 功能 3 扩展总线 3 Watchdog 功能 3 第二章 安装说明 4 产品外形尺寸图 4 接口位置示意图 5 跳线功能设置 6 SATA接口 7 SATA硬盘热插拔 7 USB接口 9 串口 10 ...

Page 36: ...并口 11 网络接口 11 显示接口 12 CF卡 13 PCI插槽 14 PCIE X1 插槽 15 音频接口 15 风扇接口 16 电源接口 16 数字I O接口 16 状态指示控制接口 17 第三章 BIOS功能简介 18 附录 19 Watchdog编程指引 19 数字IO端口编程指引 23 I O口地址映射表 28 IRQ中断分配表 29 ...

Page 37: ...m N270 CPU 搭配945GC ICH7的芯片组 板载1GB内存 提供VGA LVDS接口双显示满足不同的显示需 求 同时提供CF卡和SATA接口 丰富的I O 接口 以及PCI扩展 该款主板采用5 25寸单板结构 可以满足大多对小型化要求比较强烈的行 业 如 人脸识别终端 广告播放机 离线式IC卡智能刷卡消费系统 便携式计 算机等移动设备 本产品可广泛用于配置内部网 外部网 停火区 配置网络控 制口 满足新一代网络产品对带宽和可靠性的高要求 环境与机械尺寸 工作环境 温度 0 C 60 C 湿度 5 90 非凝结状态 贮存环境 温度 20 C 70 C 湿度 5 95 非凝结状态 尺寸 203 20mm 146 05mm ...

Page 38: ...g内存颗粒 5V 2 17A 5 3 3 3V 0 46A 5 3 12V 0 35A 5 3 微处理器 Intel Atom N230 1 6GHZ 533MHz FSB BGA437 CPU或Intel Atom Processor N270 512K Cache 1 60 GHz 533 MHz FSB CPU 芯片组 Intel 945GC Intel ICH7 系统存储器 支持DDRⅡ 533MHz内存 板载1GB内存 网络功能 在板1个10 100 1000Mbps以太网控制器 IDE 功能 1个Compact Flash接口 2个SATA接口 ...

Page 39: ...DVO转LVDS芯片实现VGA LVDS双显示 LVDS支持24位双通道屏设计 音频功能 板上集成1个标准的HDA音效芯片 提供优质的声音效果 I O 功能 1个高速并行接口 支持SPP EPP ECP 标准 6个USB2 0接口 4个RS 232 接口 其中COM1 COM2可支持RS 422 RS 485模式 1个八路数字IO接口 4I 4O 扩展总线 1个PCI插槽 1个PCIE X1插槽 PCI槽可单独使用也可通过PCI转接卡扩展3 个PCI设备 Watchdog 功能 255级 可编程按秒 超时中断或系统复位 ...

Page 40: ...第二章 安装说明 4 EC5 1812CLDNA B 第二章 安装说明 产品外形尺寸图 146 1 203 2 193 5 1 135 9 5 1 单位 mm ...

Page 41: ...5 1812CLDNA B 5 接口位置示意图 PCI1 PCIE1 AUDIO1 LAN1 FP1 FP3 FP2 JCC1 JCF1 CF1 LPT1 SYSFAN1 PWR1 LVDS2 LVDS1 GPIO1 USB1 USB2 USB3 VGA1 SATA1 SATA2 JLCD1 LCDB1 COM2 COM4 COM1 COM3 JP10 JP9 JP8 JP7 JP6 JP5 JP4 JP3 JP2 JP1 ...

Page 42: ...针 3 开计算机 4 启动时按屏幕提示进入BIOS设置 重载最优缺 省值 5 保存并退出设置 JCC1 设置 功能 1 2 开路 正常工作状态 Default 1 2 短路 清除 CMOS 内容 所有 BIOS 设置恢复成出厂值 2 CF卡电压选择 JCF1 设置 功能 1 2 短路 3 3V Default 2 3 短路 5V 3 LCD工作电压选择 JLCD1 设 置 功 能 1 2 短路 3 3V Default 2 3 短路 5V 4 串口RS232 RS422 RS485模式选择 COM1和COM2支持RS 232 RS 422 RS 485可选 其中COM1通过设置JP1 JP5 实现模式选择 COM2通过设置JP6 JP10来实现模式选择 具体设置如下 ...

Page 43: ...P1 JP6 1 2 5 6 3 4 JP2 JP7 1 2 2 3 2 3 JP3 JP8 1 2 2 3 2 3 JP4 JP9 1 2 2 3 2 3 JP5 JP10 1 2 2 3 2 3 SATA 接口 SATA1 SATA2 管脚 信号名称 1 GND 2 TX 3 TX 4 GND 5 RX 6 RX 7 GND SATA 硬盘热插拔 SATA 硬盘热插拔需注意 1 硬盘必须支持 SATA 2 0 接口 并且采用 15 芯 SATA 硬盘电源接口 2 芯片组驱动程序支持 SATA 硬盘的热插拔 3 不能对操作系统所在的 SATA 硬盘进行带电热插拔 ...

Page 44: ... 安装说明 8 EC5 1812CLDNA B 请按照如下步骤进行 SATA 硬盘热插拔 否则 操作不当会导致硬盘损坏和 数据丢失 热插入SATA硬盘步骤 步骤1 请将SATA电源线1x4 针脚 白色 一端接到电源适配器的1x4 针脚电 源线一端 步骤2 将SATA 数据线接到主板上的SATA接口 步骤3 将SATA电源线15 针脚接口 黑色 一端接到SATA硬盘 SATA 硬盘数据线 SATA 硬盘电源线 ...

Page 45: ...盘 热拔出SATA硬盘步骤 步骤 1 从设备管理器中卸载该硬盘 步骤 2 从 SATA 硬盘一侧拔去 SATA 数据线 步骤 3 从 SATA 硬盘一侧拔去 SATA 15 针脚电源线接口 黑色 USB 接口 本主板提供3组USB接口 可连接6个标准的USB设备 USB1 USB3 管脚 信号名称 管脚 信号名称 1 5V 2 5V 3 USB1_Data 4 USB2_Data 5 USB1_Data 6 USB2_Data 7 GND 8 GND 9 NC 10 GND_CHASSIS ...

Page 46: ...M1和COM2支持RS 232 RS 422 RS 485 可选 COM3和COM4支持RS 232模式 COM1 COM2 管脚 信号名称 RS 232 RS 422 RS 485 1 DCD TXD Data 2 RXD TXD Data 3 TXD RXD X 4 DTR RXD X 5 GND GND GND 6 DSR X X 7 RTS X X 8 CTS X X 9 RI X X 10 NC NC NC COM3 COM4 管脚 信号名称 1 DCD 2 RXD 3 TXD 4 DTR 5 GND 6 DSR 7 RTS 8 CTS 9 RI 10 NC ...

Page 47: ... PD3 10 GND 11 PD4 12 GND 13 PD5 14 GND 15 PD6 16 GND 17 PD7 18 GND 19 ACK 20 GND 21 BUSY 22 GND 23 PE 24 GND 25 SLCT 26 NC 网络接口 本主板提供1个在板10 100 1000M LAN接口 是2 7针接口 需要用转接线 固定到机箱上与外部设备连接 以下给出了它的管脚安排和相应的输入插座 LAN1 管脚 信号名称 管脚 信号名称 1 MX0 2 MX0 3 MX1 4 MX1 5 MX2 6 MX2 7 MX3 8 MX3 9 GND 10 GND 11 LINK_LED 12 LINK_LED 13 ACT_LED 14 ACT_LED ...

Page 48: ...称 管脚 信号名称 1 LVDSO_D0 2 LVDSO_D0 3 GND 4 GND 5 LVDSO_D1 6 LVDSO_D1 7 GND 8 GND 9 LVDSO_D2 10 LVDSO_D2 11 GND 12 GND 13 LVDSO_CLK 14 LVDSO_CLK 15 GND 16 GND 17 LVDSO_D3 18 LVDSO_D3 19 VDD 20 VDD LVDS2 管脚 信号名称 管脚 信号名称 1 LVDSE_D0 2 LVDSE_D0 3 GND 4 GND 5 LVDSE_D1 6 LVDSE_D1 7 GND 8 GND 9 LVDSE_D2 10 LVDSE_D2 11 GND 12 GND 13 LVDSE_CLK 14 LVDSE_CLK 15 GND 16 GND 17 LVDSE_D3 18 LVDSE_D3 19 VDD 20 VDD ...

Page 49: ...2 D3 27 D11 3 D4 28 D12 4 D5 29 D13 5 D6 30 D14 6 D7 31 D15 7 CS0 32 CS1 8 GND 33 VS1 9 ATASEL 34 IOR 10 GND 35 IOW 11 GND 36 WE 12 GND 37 IRQ 13 VCC 38 VCC 14 GND 39 CSEL 15 GND 40 VS2 16 GND 41 RESET 17 GND 42 IORDY 18 A2 43 DREQ 19 A1 44 DACK 20 A0 45 DASP 21 D0 46 ATA66_DET 22 D1 47 D8 23 D2 48 D9 24 WP IOCS16 49 D10 25 CD2 50 GND ...

Page 50: ...13 GND B43 3 3V A14 PCI_GNT1 A44 PCI_AD15 B14 CLK_PCI0 B44 PCI_C BE 1 A15 PCI_RST A45 3 3V B15 GND B45 PCI_AD14 A16 5V A46 PCI_AD13 B16 CLK_PCI1 B46 GND A17 PCI_GNT0 A47 PCI_AD11 B17 GND B47 PCI_AD12 A18 GND A48 GND B18 PCI_REQ0 B48 PCI_AD10 A19 PCI_REQ2 A49 PCI_AD9 B19 5V B49 GND A20 PCI_AD30 A50 PCI_C BE 0 B20 PCI_AD31 B50 PCI_AD8 A21 3 3V A51 3 3V B21 PCI_AD29 B51 PCI_AD7 A22 PCI_AD28 A52 PCI_A...

Page 51: ...T A6 TDI B7 GND A7 TDO B8 3 3V A8 TMS B9 TRST A9 3 3V B10 3 3Vaux A10 3 3V B11 WAKE A11 PWRGD B12 RSVD A12 GND B13 GND A13 REFCLK B14 PETp0 A14 REFCLK B15 PETn0 A15 GND B16 GND A16 PERp0 B17 PRSNT2 A17 PERn0 B18 GND A18 GND 音频接口 AUDIO1 管脚 信号名称 管脚 信号名称 1 LOUT_R 2 LOUT_L 3 GND_AUDIO 4 GND_AUDIO 5 LIN_R 6 LIN_L 7 GND_AUDIO 8 GND_AUDIO 9 MIC_L 10 MIC_R ...

Page 52: ...风扇气流调整成能将热量排出的方向 SYSFAN1 管脚 信号名称 1 GND 2 12V 3 FAN_IO 4 FAN_PWM FAN_IO 风扇转速脉冲输出 FAN_PWM 风扇转速PWM控制 电源接口 10PIN ATX 电源接口 PWR1 管脚 信号名称 管脚 信号名称 1 PS_ON 6 5VSB 2 GND 7 5V 3 GND 8 5V 4 12V 9 12V 5 3 3V 10 GND 数字 I O 接口 主板提供四路输入 四路输出的GPIO接口 GPIO1 管脚 信号名称 管脚 信号名称 1 INPUT1 2 OUTPUT1 3 INPUT2 4 OUTPUT2 5 INPUT3 6 OUTPUT3 7 INPUT4 8 OUTPUT4 9 GND 10 NC ...

Page 53: ...号名称 1 PWRBTN 2 GND 3 GND 4 RESET 5 IDE_LED 6 IDE_LED 2 电源指示灯接口 FP2 管脚 信号名称 1 PWR_LED 2 NC 3 GND 3 扬声器输出接口 FP3 管脚 信号名称 1 SPEAKER 2 NC 3 GND 4 5V 4 LCD背光控制接口 LCDB1 管脚 信号名称 1 VCC_LCDBKLT 2 NC 3 LCD_BKLTEN 4 GND 注 VCC_LCDBKLT 背光电源 提供 12V 电压 此脚电流限制在 1A 以下 LCD_BKLTEN 背光使能 高有效 ...

Page 54: ...第三章 BIOS 功能简介 18 EC5 1812CLDNA B 第三章 BIOS 功能简介 主板BIOS相关功能简介请参照我公司的 AMI BIOS设置指南 ...

Page 55: ... 对WDT的编程需遵循以下步骤 进入WDT编程模式 设置WDT工作方式 启动WDT 关闭WDT 退出WDT编程模式 需要include 以下几个文件 include stdio h include dos h include bios h include stdlib h include string h 1 进入WDT编程模式 取得pm BASE watchdog 的设置在pm_base offset register中 outportb 0x2e 0x55 进入WDT编程模式 在INDEX PORT 写0x55 INDEX PORT 4e 2e DATA PORT 4F 2F INDEX中读入寄存器 DATA 向寄存器写入数据 outportb 0x2e 0x07 reg0X07 用来选择logic device outportb 0x2f 0x0A 选择logic deviceA ...

Page 56: ...r outportb 0x2e 0x61 reg61 get low base from this register base_addr inportb 0x2f and save to global VAR pm_Base pm_base pm_base 8 pm_base pm_base base_addr define WRITEREG reg val tmp_reg pm_base reg outportb tmp_reg val 2 设置WDT工作方式 复位或中断方式 选择一种 a 配置WDT成复位工作方式 WRITEREG 0x47 0x0c pm_base offset 0x47 register 0x47 bit 0 in out 1 input 0 output bit 1 polarity 1 invert 0 no invert bit 3 2 Alternate F...

Page 57: ...h Pull b 配置WDT成中断工作方式 irq irq 4 WRITEREG 0x47 0x80 pm_base offset 0x47 WRITEREG 0x67 irq pm_base offset 0x47 register 0x67 bit 7 4 WDT interrupt Mapping 1111 IRQ 15 0011 IRQ3 0010 IRQ2 0001 IRQ1 0000 Disable 其中 IRQ_RESOURCE 0 禁止使用任何中断 3 选择WDT按分或按秒计时 选择一种 a 选择WDT按分计时用以下语句 假定已处于WDT编程状态 WRITEREG 0x65 0 ...

Page 58: ...Select 0 MInutes default 1 Seconds b 选择WDT按秒计时以下语句 假定已处于WDT编程状态 WRITEREG 0x65 0x80 4 启动 禁止WDT 假定已处于WDT编程状态 WRITEREG 0x66 TIME OUT VALUE pm_base offset 0x66 写入预设的时间 TIME OUT VALUE 注意 TIME OUT VALUE的取值范围从1到255 计时单位为 分 或 秒 如果TIME OUT VALUE为零 则禁止WDT TIME OUT VALUE为任何非零值都将启动WDT 5 退出WDT编程模式 outportb 0x2e 0x00 ...

Page 59: ...程模 式 对数字I O端口的编程需遵循以下步骤 进入数字 I O 端口编程模式 对数字 I O 端口输入或输出操作 退出数字 I O 端口编程模式 数字I O端口的编程方法 请参看以下示范代码 unsigned long _pascal in_32 unsigned int io_port unsigned long ReturnValue _asm mov dx io_port in eax dx mov ReturnValue eax return ReturnValue void _pascal out_32 unsigned int io_port unsigned long io_data _asm mov dx io_port mov eax io_data out dx eax ...

Page 60: ...dr long data long pci_data out_32 0xCF8 addr out_32 0xcfc data return pci_data long addr_pci 0x8000F848 long io_base read_pci addr_pci 0x0000fffe Bus 0 Dev 1F Fun 0 Reg 48 Dword Reg get Base Address unsigned int addr_statue io_base 0x1a outportb addr_statue 0x00 addr_statue io_base 0x1b outportb addr_statue 0x00 base offset 1ah 1bh GPIO ...

Page 61: ...tportb addr_select get_1x base offset2h GPIO Use Select Register bit 0 1 bit 2 1 selset GP16 GP18 as GPIO addr_select io_base 0x03 unsigned int get_2x inportb addr_select 0x1c outportb addr_select get_2x base offset3h GPIO Use Select Register bit 4 2 111 sels et GP28 GP26 as GPIO addr_select io_base 0x30 unsigned int get_3x inportb addr_select 0xc2 ...

Page 62: ...t_0 inportb addr_select2 0x04 get_0 get_0 0xfe outportb addr_select2 get_0 base offset6h GPIO IN OUT Select Register bit 0 0 bit 2 1 sel set GP18 as input GP16 as output addr_select2 io_base 0x07 unsigned int get_2 inportb addr_select2 0xe3 outportb addr_select2 get_2 base offset7h GPIO IN OUT Select Register bit 4 2 000 selset GP28 GP26 as output addr_select2 io_base 0x34 unsigned int get_3 inpor...

Page 63: ..._o1 io_base 0x0e unsigned int addr_o2 io_base 0x0f get output base unsigned int addr_i1 io_base 0x0e unsigned int addr_i3 io_base 0x38 get input base unsigned int num_1 inportb addr_o1 0xfe outportb addr_o1 num_1 unsigned int num_2 inportb addr_o2 0xe3 outportb addr_o2 num_2 将输出引脚设置为低电平 短接输入输出引脚 测量输入引脚电压 若输 入引脚为低电平则数值IO正常 否则不正常 也可用同样的方法将输出引脚设置 为高电平 短接 测试输出引脚 看输入引脚是否为高电平 ...

Page 64: ... 定时器 061h 系统扬声器 070h 071h 实时时钟 081h 083h DMA 控制器 087h DMA 控制器 089h 08Bh DMA 控制器 08Fh DMA 控制器 0A0h 0A1h 中断控制器 0C0h 0DFh DMA 控制器 0F0h 0FFh 数值数据处理器 170h 177h 从 IDE 通道 1F0h 1F7h 主 IDE 通道 200h 207h 通讯端口 COM3 208h 20Fh 通讯端口 COM4 274h 277h ISAPNP 读数据端口 279h ISAPNP 读数据端口 2F8h 2FFh 通讯端口 COM2 376h 从 IDE 通道 378h 37Fh 打印机端口 LPT1 3B0h 3DFh Intel 945 芯片集 3F6h 主 IDE 通道 3F8h 3FFh 通讯端口 COM1 400h 41Fh 南桥控制器 ...

Page 65: ...器共有 11 个中断源 有些已被系统设备独占 只有未被独占的中断才可分配给 其他设备使用 ISA 设备要求独占使用中断 只有即插即用 ISA 设备才可由 BIOS 或操作系统分配中断 PCI 设备使用 APIC 中断 由操作系统分配 下表给出了 兼容 ISA 的中断分配情况 级别 功能 IRQ0 系统计时器 IRQ3 串口 3 4 IRQ4 串口 1 2 IRQ8 系统 CMOS 实时钟 IRQ9 ACPI 适配系统 IRQ13 数值数据处理器 IRQ14 主 IDE 通道 IRQ15 从 IDE 通道 欲获得更多信息 请访问研祥网站www evoc com ...