Chapter 2
Channel Operation
page 2 - 4
Excalibur Systems
2.2
Global Control Registers and Memory Map
The global memory block contains all the module global functions.
Read
The Global Hardware Revision register indicates the hardware FPGA revision level.
Global Hardware Revision
00800 H
Global Software Reset
00802 H
Global Configuration
00804 H
Global Start
00806 H
Global Interrupt Status
00808 H
Global Time Tag Reset
0080AH
Global Time Tag Counter
0080C – 0080E H
Spare
00810 H
Reserved [Factory test]
00812 H
Reserved
00814 – 1FFFF H
Figure 2-1
Global Registers Memory Map
2.2.1
Global Hardware Revision Register
Address:
00800 (H)
Bit
Bit Name
Description
04-15
Module ID
Hard coded to value 708 H
00-03
FPGA Rev.
1 = Rev 1
2 = Rev 2
3 = Rev 3
Global Hardware Revision Register
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