Chapter 1
Introduction
M4K708 Module: User’s Manual
page 1 - 2
1.1.1
M4K708
Module Features
See
Chapter 4 Ordering Information
, for exact part numbers.
1.1.2
M4K708
Module Block Diagram
Figure 1-1
M4K708
Module Block Diagram
General Features
Supports 2 ARINC-708/453 channels, each
programmable as transmit or receive
64K
×
16 FIFO per channel holds up to 655 1600-
bit words
Optional bus termination
Interrupt and polling modes of operation
Loopback test capability
Receive Channel
Transmit Channel
Receive features:
Word status tagging
Word time tagging (32-bit)
Receive count interval trigger
Transmission modes:
One-shot [one 1600-bit word at a time]
Continuous [as long as FIFO not empty]
Continuous FIFO retransmit
Receive counter [indicates number of words
received]
Programmable inter word gap time
[0–6.5 sec @ 100
μ
sec resolution]
Polling conditions:
FIFO full
FIFO half full
FIFO empty
‘
n
’ Words received
Polling conditions:
FIFO full
FIFO half full
FIFO empty
‘
n
’ Words transmitted
Interrupt conditions:
FIFO full
‘
n
’ Words received
Interrupt conditions:
FIFO empty
‘
n
’ Words transmitted
Physical Characteristics
Dimensions:
67mm
×
48mm
Weight:
20g
Host Interface
EXC-4000 series of carrier boards
Power:+5V @ 600mA both channels
transmitting @ 50% duty cycle
Operating Environmen
t
Temperature:
0° to 70°C standard temperature
-40° to +85°C extended temperature
[optional]
Humidity:
5%–90% condensing
Software Support
C drivers with source code
M4K
Local
Bus
Local Bus
Interface
&
Channel’s
Logic
FPGA
Ch#0
Bus
Ch#1
Bus
Ch#1
Front
End
Ch#1
Tx/Rx
64Kx16 FIFO
Ch#0
Tx/Rx
64Kx16 FIFO
Addr/Data/Ctrl
Ch#0
Front
End
Config
DIP Sw
40MHz
Osc
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