M
ODEL
SL900A V
ERSION
V_1.0
P
REPARED BY
H/W
D
ATE
2006.06.30
S
UBJECT
T
ECHNICAL
M
ANUAL
P
AGE
39/51
SL900A
T
ECHNICAL
M
ANUAL
The MT6305 integrates seven LDOs that are optimized for their given functions by balancing
quiescent current, dropout voltage, line/load regulation, ripple rejection, and output noise.
Figure 25. Functional Block Diagram of MT6305
2.
Digital Core LDO (Vcore)
The digital core LDO is a regulator that could source 100mA
with 1.2V output voltage with Pin3(DANODE) GND. If Pin2 is not GND, The output Voltage
is 1.8V. It supplies the baseband circuitry in the handset. The LDO is optimized for very low
quiescent current.
3.
Digital IO LDO (DVDD)
The digital IO LDO is a regulator that could source 100mA with 2.8V output voltage. It supplies the
baseband circuitry in the handset.
4.
Analog LDO (AVDD)
The analog LDO is a regulator that could source 150mA with 2.8V output voltage. It supplies the
analog sections of the baseband chipsets. The LDO is optimized for low frequency ripple rejection in
Summary of Contents for SL900A
Page 1: ...SL900A SL900A ...