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FIBOCOM NL668-LA Series Hardware Guide
Page 16 of 61
Pin No.
Pin Name
I/O Level
Description
V
OL
max=0.45V
V
OH
min=2.55V
18
NC
-
-
NC
19
GND
G
-
Ground
20
RESET_N
I
V
IH
max=2.1V
V
IH
min=1.3V
V
IL
max=0.5V
Module reset signal, active low, no need
pull up externally
21
PWRKEY
I
V
IH
max=2.1V
V
IH
min=1.3V
V
IL
max=0.5V
Module power on/off signal, active low, no
need pull up externally. The input is pulled
up to an internal voltage minus a diode
drop. As per the design, this causes the
voltage of the pin is about 0.8V
22
GND
G
-
Ground
23
SD_INS_DET
I
-
Reserved
24
PCM_IN
I
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
PCM input signal
25
PCM_OUT
O
V
OL
max=0.45V
V
OH
min=1.35V
PCM output signal
26
PCM_SYNC
IO
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
PCM synchronization signal
27
PCM_CLK
IO
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
PCM clock signal
28
SDC2_DATA3
IO
-
Reserved
29
SDC2_DATA2
IO
-
Reserved
30
SDC2_DATA1
IO
-
Reserved
31
SDC2_DATA0
IO
-
Reserved
32
SDC2_CLK
O
-
Reserved