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FIBOCOM NL668-LA Series Hardware Guide
Page 22 of 61
Table 4-2 Filter capacitors design of power supply
Recommended Capacitor
Application
Description
220uF x 2
Regulating capacitor
Reduce power fluctuations during
module operation, requiring low ESR
Capacitor
LDO or DCDC power requires not
less than 440uF capacitor
Battery power can be properly
reduced to 100uF ~ 220uF capacitor
1uF, 100nF
Digital signal noise
Filter clock and digital signal
interference
39pF, 33pF
700, 850/900 MHz bands
Filter low band RF interference
18pF, 8.2pF, 6.8pF
1700/1800/1900,2100/2300,2500/
2600MHz bands
Filter middle/high band RF
interference
The power stability can ensure the normal operation of NL668-LA module. The power supply ripple limit
for the module is no more than 300mV (the circuit ESR < 100mΩ) requires special attention when design
circuit.
When the module is operating in GSM mode (Burst transmit), the maximum operating current can reach
3A, and the power voltage needs to be at least 3.3V. Otherwise, the module may power off or restart. The
power limit is shown in Figure 4-2:
Burst transmit
Burst transmit
min:3.3V
VBAT
Ripple
≤
300mV
Drop
VBAT
≥
3.3V
Figure 4-2 Power limit
4.3 1.8V Output
The NL668-LA series module outputs a 1.8V voltage through the VDD_EXT for the use of the internal
digital circuit of module. The voltage is the logic level of the module and can be used to indicate module
