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FIBOCOM_NL952-NA_Hardware_User_Manual
Page 15 of 57
Pin Pin Name
I/O
Reset Value
Pin Description
Level
26 W_DISABLE2#
I
PD
GNSS disable, active low, Reserved
3.3/1.8V
27 GND
-
-
GND
Power Supply
28 I2S_WA
O
PD
I2S Word alignment/select, Reserved
1.8V
29 USB3.0_TX-
O
USB3.0 Transmit data minus
30 UIM_RESET
O
PD
SIM reset signal
1.8V/3V
31 USB3.0_TX+
O
USB3.0 Transmit data plus
32 UIM_CLK
O
PD
SIM clock Signal
1.8V/3V
33 GND
-
-
GND
Power Supply
34 UIM_DATA
I/O
PD
SIM data input/output
1.8V/3V
35 USB3.0_RX-
I
USB3.0 receive data minus
36 UIM_PWR
O
SIM power supply, 1.8V/3V
1.8V/3V
37 USB3.0_RX+
I
USB3.0 receive data plus
38
PCIe_
BOOT_DISABLE
I
PD
PCIe early boot/USB normal boot select,
Reserved
1.8V
39 GND
-
-
GND
Power Supply
40 SIM2_DETECT
I
PD
SIM2 Detect, internal pull up(390K
Ω
),
active high
1.8V
41 PETn0
O
PCIe TX Differential signals
Negative
42 UIM2_DATA
I/O
PD
SIM2 data input/output
1.8V/3V
43 PETp0
O
PCIe TX Differential signals Positive
44 UIM2_CLK
O
PD
SIM2 clock Signal
1.8V/3V
45 GND
-
-
GND
Power Supply
46 UIM2_RESET
O
PD
SIM2 reset signal
1.8V/3V
47 PERn0
I
PCIe RX Differential signals
Negative
48 UIM2_PWR
O
SIM2 power supply, 1.8V/3V
1.8V/3V
49 PERp0
I
PCIe RX Differential signals Positive
50 PERST#
I
PU
Asserted to reset module PCIe interface
default. If module went into core dump, it
will reset whole module, not only PCIe
interface.
Active low, internal pull up(10K
Ω
)
3.3/1.8V
51 GND
-
-
GND
Power Supply