n
Function
The three DC voltages from the power module are used for
generating the following four supply voltages in the counter:
+5 V
Reg5 V from the power module is used directly.
–5.2 V
–7 V is used, with regulator U43.
+12 V
+15 V is used, with regulator U41.
+7 V
Stab12 V is used, with regulator U21A and Q17.
The following supply voltage is used for a special purpose:
+12 V*
This voltage comes directly from the +12 V regulator U41and will be
present as soon as the power cord is connected, regardless of the po-
sition of the ON/STANDBY switch. It is used for the ON/STANDBY
control logic and for supplying an optional OCXO in STANDBY to
avoid the long warm-up time otherwise needed to obtain maximum
accuracy.
At stand-by, the four main supply voltages are switched off, but as
described above, some parts of the instrument should not be
diconnected. Therefore the power module will never be switched off.
The PM6685 has consequently only a secondary power switch.
A relay (K5) disconnects the load on the +5 V and –5.2 V at stand-by.
Because the power module must always have a load on the regulated
voltage, seven bleeder resistors R149-R155 are always connected to
+5 V via J15. At stand-by the counter only needs +15 V, so a dummy
load consisting of R130-R145 is connected to the power module by
means of the relay K5 in order to stabilize the operation of the
switchmode converter.
+5 V controls the switching on/off of +12 V and +7 V. When +5 V is
on, Q6 and Q5 will conduct, i.e. +12 V will be on. If there is no +5 V,
Q6 and Q5 will be off, thus blocking the +12 V.
The ON/STANDBY logic controls relay K5, which operates as de-
scribed above. It is also possible to open the relay by changing the
position of J16.
The ON/STANDBY logic consists of the RS (set-reset) flip-flop
U40B that is controlled by the ON/STANDBY button on the front
panel. Pressing STANDBY will apply a high voltage (+12 V) to the
set input. The inverting output of the flip-flop will be low, discon-
necting K5 via Q14. Pressing ON will give a high voltage (+12 V) on
the reset input. The inverting output of the flip-flop will be high,
engaging K5. Inserting the power cord into the power inlet will cause
a pulse on the reset input, via C35. The microcomputer can disable
the ON/STAND-BY button via Q12 and Q7. This is done in remote
mode and during RAM-testing. A high level on the base of Q12 en-
ables STAND-BY, a low level disables it.
The STAND-BY indicator on the front panel is controlled by the
+5 V via Q16. +5 V
off
lights the STAND-BY LED that is fed by the
uninterru12 V*.
+5 V also indirectly controls the fan in the PM6685R. It is a 12 V DC
fan that operates only if +12 V is on. An NTC resistor, serving as a
temperature sensor, controls the speed by applying a variable refer-
ence voltage to the fan voltage regulator U42.
Counter ASIC
The main part of the counting logic is integrated in a CMOS ASIC
specially designed for the Fluke MultiFunction Counter series. There
are also analog blocks included in the 100 pin QPF package.
MUX
The MUX block is a switchboard for incoming and internal signals
involved in the measuring process. Some signals are divided by 2 to
make it possible to measure higher frequencies. The trigger slope is
controlled by the MUX block as well. A trigger edge detector senses
the presence or absence of comparator pulses and controls the trigger
level DAC’s in the TLDAC block. These functional units form an es-
sential part of the Auto Trigger System.
OSC
The oscillator block generates, selects, and distributes the reference
clock for the circuit. The active semiconductors of the standard oscil-
lator are included in this block. The crystal is connected to pins X1
and X2. A TCXO or OCXO is connected to X2 only. An external ref-
erence clock is connected to EXTREF. The PWM signal generated at
OTRIM controls the frequency of the reference oscillator after exter-
nal integration.
PG
A built-in pulse generator having the 10 MHz clock as a reference
can generate pulses with controllable duration and repetition rate at
the OUTPUT connector. The level is fixed TTL.
RTC
A real time clock not used at present.
TLDAC
This block contains two 10-bit DAC’s generating the trigger levels
for the input comparators, VOUTA for channel A and VOUTB for
channel B. An external reference voltage is connected to V+REFA
and V+REFB.
HO
The Hold Off block can manipulate the internal measuring signal X
in several ways. One operating mode simulates a low pass filter (nor-
mal hold off), another mode is used in burst measurements.
The following blocks (SYNC, STST, CNTS and MCTRL) form the
actual measuring logic in the ASIC. Three types of measurements
can be made in this MEAS block:
Continuous measurements (frequency, ratio and period average).
Not used at present.
Controlled measurements (time interval, period single, pulse width,
frequency, totalize gated, totalize start-stop, and ratio).
Totalize manual.
SYNC
The SYNC block synchronizes the actual measurement with certain
internal or external events like measuring time and arming signals.
STST
The start and/or the stop of the measurements are controlled by this
block. External events can be used to define the exact moments.
4-10 Hardware Functional Description
Summary of Contents for PM6685
Page 1: ...Programmable Frequency Counter PM6685 PM6685R Service Manual ...
Page 4: ...This page is intentionally left blank ...
Page 5: ...Chapter 1 Safety Instructions ...
Page 7: ...Chapter 2 Performance Check ...
Page 12: ...This page is intentionally left blank 2 6 Performance Check Options ...
Page 13: ...Chapter 3 Disassembly ...
Page 16: ...This page is intentionally left blank 3 4 Disassembly PM9691 or PM9692 Oven Oscillator ...
Page 17: ...Chapter 4 Circuit Descriptions ...
Page 33: ...Chapter 5 Repair ...
Page 42: ...This page is intentionally left blank 5 10 Safety Inspection and Test After Repair ...
Page 43: ...Chapter 6 Calibration Adjustments ...
Page 49: ...Chapter 7 Replacement Parts ...
Page 53: ...Replacement Parts Mechanical Parts 7 5 80 Lug bent 15 to lock ...
Page 62: ...This page is intentionally left blank 7 14 Replacement Parts GPIB Interface PM9626B ...
Page 63: ...Chapter 8 Drawings Diagrams ...
Page 65: ...This page is intentionally left blank Drawings Diagrams 8 3 ...
Page 66: ...Main PCB Component layout 8 4 Drawings Diagrams Top View ...
Page 68: ...Main PCB Component layout 8 6 Drawings Diagrams Bottom View K2 K1 K3 K4 ...
Page 70: ...This page is intentionally left blank 8 8 Drawings Diagrams ...
Page 72: ...8 10 Drawings Diagrams This page is intentionally left blank ...
Page 74: ...8 12 Drawings Diagrams This page is intentionally left blank ...
Page 76: ...Display Keyboard PCB Component layout 8 14 Drawings Diagrams ...
Page 78: ...GPIB Unit PM9626B Component layout 8 16 Drawings Diagrams ...
Page 79: ...GPIB Unit PM9626B Drawings Diagrams 8 17 ...
Page 80: ...This page is intentionally left blank 8 18 Drawings Diagrams ...
Page 81: ...Chapter 9 Appendix ...
Page 89: ...Replacement Parts 9 9 This page is intentionally left blank ...
Page 90: ...Power Supply Component layout 9 10 Replacement Parts BOTTOM SIDE TOP SIDE ...