HOST INTERFACE (HI)
MOTOROLA
PORT B
5 - 55
5.3.6.3
DMA Data Transfer
The DMA mode allows the transfer of 8-, 16- or 24-bit data through the DSP HI under the
control of an external DMA controller. The HI provides the pipeline data registers and the
synchronization logic between the two asynchronous processor systems. The DSP host
exceptions provide cycle-stealing data transfers with the DSP internal or external mem-
ory. This technique allows the DSP memory address to be generated using any of the
;****************************************
; MAIN PROGRAM... transmit 24-bit data to host
;****************************************
ORG
P:$40
MOVEP
#1,X:PBC
;Turn on Host Port
MOVEP
#$0C00,X:IPR
;Turn on host interrupt
MOVEP
#0,X:HCR
;Turn off XMT and RCV interrupts
MOVE
#0,SR
;Unmask interrupts
JCLR
#3,X:HSR,*
;Wait for HF0 (from host) set to 1
AND
X0,A
JEQ
LOOP
MOVEP
#$2,X:HCR
;Enable host transmit interrupt
JMP
*
;Now wait for interrupt
Figure 5-34 Main Program - Transmit 24-Bit Data to Host
;***********************************
;TRANSMIT to Host Interrupt Routine
;************************************
XMT
MOVEP
#$123456,X:HTX
;Test value to transmit
MOVEP
#0,X:HCR
;Turn off XMT Interrupt
RTI
END
Figure 5-35 Transmit to HI Routine
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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