SYNCHRONOUS SERIAL INTERFACE (SSI)
6 - 134
PORT C
MOTOROLA
SSI port to begin data reception. A jump-to-self instruction is then used to hang the pro-
cessor and allow interrupts to receive the data. Normally, the processor would execute
useful instructions while waiting for the receive interrupts. When an interrupt occurs, the
JSR instruction at the interrupt vector location transfers control to the RCV subroutine.
The input flag is tested, and data is put in the left or right data buffer depending on the
results of the test. The RTI instruction then returns control to the main program, which
will wait for the next interrupt.
;*************************************************
;
SSI and other I/O EQUATES
*
;*************************************************
IPR
EQU
$FFFF
SSISR
EQU
$FFEE
CRA
EQU
$FFEC
CRB
EQU
$FFED
PCC
EQU
$FFE1
RX
EQU
$FFEF
FLG
EQU
$0010
;*************************************************
;
INTERRUPT VECTOR
*
;*************************************************
ORG
P:$000C
JSR
RCV
;*************************************************
;
MAIN PROGRAM
*
;*************************************************
ORG
P:$40
MOVE
#0,R0
;Pointer to memory buffer for
MOVE
#$08,R1
;received data. Note data will be
MOVE
#1,M0
;split between two buffers which are
MOVE
#1,M1
;modulus 2.
Figure 6-74 Normal Mode Receive Example (Sheet 1 of 2)
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Freescale Semiconductor, Inc.
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