SYNCHRONOUS SERIAL INTERFACE (SSI)
MOTOROLA
PORT C
6 - 135
;*************************************************
;
Initialize SSI Port
*
;*************************************************
MOVEP
#$3000,X:IPR
;Set interrupt priority register for SSI.
MOVEP
#$4000,X:CRA
;Set word length = 16 bits.
MOVEP
#$A300,X:CRB
;Enable RIE and RE; synchronous
;mode with bit frame sync;
;clock and frame sync are
;external; SC0 is an output.
;*************************************************
;
Init SSI Interrupt
*
;*************************************************
ANDI
#$FC,MR
;Unmask interrupts.
MOVEP
#$01F8,X:PCC
;Turn on SSI port.
JMP
*
;Wait for interrupt.
;*************************************************
;
MAIN INTERRUPT ROUTINE
*
;*************************************************
RCV
JSET
#0,X:SSISR, RIGHT
;Test SCO flag.
LEFT
MOVEP
X:RX,X:(RO)+
;If SCO clear, receive data
RTI
;into left buffer (R0).
RIGHT
MOVEP
X:RX,X:(R1)+
;If SCO set, receive data
RTI
;into right buffer (R1).
END
Figure 6-74 Normal Mode Receive Example (Sheet 2 of 2)
6.4.7.3
Network Mode Examples
The network mode, the typical mode in which the DSP would interface to a TDM codec
network or a network of DSPs, is compatible with Bell and CCITT PCM data/operation for-
mats. The DSP may be a master device (see Figure 6-75) that controls its own private
network or a slave device that is connected to an existing TDM network, occupying one
or more time slots. The key characteristic of the network mode is that each time slot (data
word time) is identified by an interrupt or by polling status bits, which allows the option of
ignoring the time slot or transmitting data during the time slot. The receiver operates in the
same manner except that data is always being shifted into the receive shift register and
transferred to the RX. The DSP reads the receive data register and uses or discards the
contents. Overrun and underrun errors are detected.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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