Chapter 2 Port Integration Module (S12XEP100PIMV1)
MC9S12XE-Family Reference Manual , Rev. 1.19
126
Freescale Semiconductor
2.3.30
Port S Input Register (PTIS)
2.3.31
Port S Data Direction Register (DDRS)
1
PTS
Port S general purpose input/output data
—Data Register
Port S pin 3 is associated with the TXD signal of the SCI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
0
PTS
Port S general purpose input/output data
—Data Register
Port S bits 2 is associated with the RXD signal of the SCI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Address 0x0249
Access: User read
(1)
1. Read: Anytime.
Write:Never, writes to this register have no effect.
7
6
5
4
3
2
1
0
R
PTIS7
PTIS6
PTIS5
PTIS4
PTIS3
PTIS2
PTIS1
PTIS0
W
Reset
u
u
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-28. Port S Input Register (PTIS)
Table 2-27. PTIS Register Field Descriptions
Field
Description
7-0
PTIS
Port S input data
—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
Address 0x024A
Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
7
6
5
4
3
2
1
0
R
DDRS7
DDRS6
DDRS5
DDRS4
DDRS3
DDRS2
DDRS1
DDRS0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-29. Port S Data Direction Register (DDRS)
Table 2-26. PTS Register Field Descriptions (continued)
Field
Description
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
