Chapter 2 Port Integration Module (S12XEP100PIMV1)
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
155
2.3.69
Port AD0 Data Register 0 (PT0AD0)
2.3.70
Port AD0 Data Register 1 (PT1AD0)
Address 0x0270
Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
7
6
5
4
3
2
1
0
R
PT0AD07
PT0AD06
PT0AD05
PT0AD04
PT0AD03
PT0AD02
PT0AD01
PT0AD00
W
Altern.
Function
AN15
AN14
AN13
AN12
AN11
AN10
AN9
AN8
Reset
0
0
0
0
0
0
0
0
Figure 2-67. Port AD0 Data Register 0 (PT0AD0)
Table 2-65. PT0AD0 Register Field Descriptions
Field
Description
7-0
PT0AD0
Port AD0 general purpose input/output data
—Data Register
This register is associated with ATD0 analog inputs AN[15:8] on PAD[15:8], respectively.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
Address 0x0271
Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
7
6
5
4
3
2
1
0
R
PT1AD07
PT1AD06
PT1AD05
PT1AD04
PT1AD03
PT1AD02
PT1AD01
PT1AD00
W
Altern.
Function
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
Reset
0
0
0
0
0
0
0
0
Figure 2-68. Port AD0 Data Register 1 (PT1AD0)
Table 2-66. PT1AD0 Register Field Descriptions
Field
Description
7-0
PT1AD0
Port AD0 general purpose input/output data
—Data Register
This register is associated with ATD0 analog inputs AN[7:0] on PAD[7:0], respectively.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
