Chapter 10 XGATE (S12XGATEV3)
MC9S12XE-Family Reference Manual , Rev. 1.19
364
Freescale Semiconductor
Read: Anytime
Write: Anytime
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R
XGIF_3F XGIF_3E XGIF_3D XGIF_3C XGIF_3B XGIF_3A XGIF_39
XGIF_38
XGF _37
XGIF_36
XGIF_35
XGIF_34
XGIF_33
XGIF_32
XGIF_31
XGIF_30
W
Reset
0
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XGIF_2F XGIF_2E XGIF_2D XGIF_2C XGIF_2B XGIF_2A XGIF_29
XGIF_28
XGF _27
XGIF_26
XGIF_25
XGIF_24
XGIF_23
XGIF_22
XGIF_21
XGIF_20
W
Reset
0
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XGIF_1F XGIF_1E XGIF_1D XGIF_1C XGIF_1B XGIF_1A XGIF_19
XGIF_18
XGF _17
XGIF_16
XGIF_15
XGIF_14
XGIF_13
XGIF_12
XGIF_11
XGIF_10
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Reset
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XGIF_0F XGIF_0E XGIF_0D
0
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W
Reset
0
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0
0
0
0
0
0
= Unimplemented or Reserved
Table 10-10. XGIV Field Descriptions
Field
Description
127–9
XGIF[78:9]
Channel Interrupt Flags
— These bits signal pending channel interrupts. They can only be set by the RISC
core (see SIF instruction
). Each flag can be cleared by writing a "1" to its bit location.
Unimplemented interrupt flags will always read "0". Section “Interrupts” of the
device overview
for a list of
implemented Interrupts.
Read:
0 Channel interrupt is not pending
1 Channel interrupt is pending if XGIE is set
Write:
0 No effect
1 Clears the interrupt flag
Figure 10-10. XGATE Channel Interrupt Flag Vector (XGIF) (continued)
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of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
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part
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indicated
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for
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in
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prior
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