Chapter 10 XGATE (S12XGATEV3)
MC9S12XE-Family Reference Manual , Rev. 1.19
374
Freescale Semiconductor
Figure 10-23. XGATE Vector Block
10.4.4
Semaphores
The XGATE module offers a set of eight hardware semaphores. These semaphores provide a mechanism
to protect system resources that are shared between two concurrent threads of program execution; one
thread running on the S12X_CPU and one running on the XGATE RISC core.
Each semaphore can only be in one of the three states: “Unlocked”, “Locked by S12X_CPU”, and “Locked
by XGATE”. The S12X_CPU can check and change a semaphore’s state through the XGATE semaphore
register (XGSEM, see
Section 10.3.1.10, “XGATE Semaphore Register (XGSEM)”
). The RISC core does
this through its SSEM and CSEM instructions.
I
illustrates the valid state transitions.
+$0000
unused
+$0024
+$0028
+$002C
+$0030
+$01E0
Code
Data
Code
Data
XGVBR
Channel $0A Initial Program Counter
Channel $0A Initial Data Pointer
Channel $09 Initial Program Counter
Channel $09 Initial Data Pointer
Channel $0B Initial Program Counter
Channel $0B Initial Data Pointer
Channel $0C Initial Program Counter
Channel $0C Initial Data Pointer
Channel $78 Initial Program Counter
Channel $78 Initial Data Pointer
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
