Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
475
Read: Anytime
Write: Anytime
11.3.2.6
S12XECRG Clock Select Register (CLKSEL)
This register controls S12XECRG clock selection. Refer to
for more details on the effect of
each bit.
Read: Anytime
Write: Refer to each bit for individual write conditions
Table 11-5. CRGINT Field Descriptions
Field
Description
7
RTIE
Real Time Interrupt Enable Bit
0 Interrupt requests from RTI are disabled.
1 Interrupt will be requested whenever RTIF is set.
4
LOCKIE
Lock Interrupt Enable Bit
0 LOCK interrupt requests are disabled.
1 Interrupt will be requested whenever LOCKIF is set.
1
SCMIE
Self Clock Mode Interrupt Enable Bit
0 SCM interrupt requests are disabled.
1 Interrupt will be requested whenever SCMIF is set.
Module Base + 0x0005
7
6
5
4
3
2
1
0
R
PLLSEL
PSTP
XCLKS
0
PLLWAI
0
RTIWAI
COPWAI
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 11-8. S12XECRG Clock Select Register (CLKSEL)
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
