MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
497
Chapter 12
Pierce Oscillator (S12XOSCLCPV2)
12.1
Introduction
The Pierce oscillator (XOSC) module provides a robust, low-noise and low-power clock source. The
module will be operated from the V
DDPLL
supply rail (1.8 V nominal) and require the minimum number
of external components. It is designed for optimal start-up margin with typical crystal oscillators.
12.1.1
Features
The XOSC will contain circuitry to dynamically control current gain in the output amplitude. This ensures
a signal with low harmonic distortion, low power and good noise immunity.
•
High noise immunity due to input hysteresis
•
Low RF emissions with peak-to-peak swing limited dynamically
•
Transconductance (gm) sized for optimum start-up margin for typical oscillators
•
Dynamic gain control eliminates the need for external current limiting resistor
•
Integrated resistor eliminates the need for external bias resistor in loop controlled Pierce mode.
•
Low power consumption:
— Operates from 1.8 V (nominal) supply
— Amplitude control limits power
•
Clock monitor
12.1.2
Modes of Operation
Two modes of operation exist:
1. Loop controlled Pierce (LCP) oscillator
2. External square wave mode featuring also full swing Pierce (FSP) without internal bias resistor
The oscillator mode selection is described in the Device Overview section, subsection Oscillator
Configuration.
Table 12-1. Revision History
Revision
Number
Revision
Date
Sections
Affected
Description of Changes
V01.05
19 Jul 2006
- All xclks info was removed
V02.00
04 Aug 2006
- Incremented revision to match the design system spec revision
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
