Chapter 23 Voltage Regulator (S12VREGL3V3V1)
MC9S12XE-Family Reference Manual , Rev. 1.19
824
Freescale Semiconductor
0x02F4
7
6
5
4
3
2
1
0
R
APIR15
APIR14
APIR13
APIR12
APIR11
APIR10
APIR9
APIR8
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 23-6. Autonomous Periodical Interrupt Rate High Register (VREGAPIRH)
0x02F5
7
6
5
4
3
2
1
0
R
APIR7
APIR6
APIR5
APIR4
APIR3
APIR2
APIR1
APIR0
W
Reset
0
0
0
0
0
0
0
0
Figure 23-7. Autonomous Periodical Interrupt Rate Low Register (VREGAPIRL)
Table 23-8. VREGAPIRH / VREGAPIRL Field Descriptions
Field
Description
15-0
APIR[15:0]
Autonomous Periodical Interrupt Rate Bits
— These bits define the timeout period of the API. See
for details of the effect of the autonomous periodical interrupt rate bits. Writable only if APIFE = 0 of
VREGAPICL register.
Table 23-9. Selectable Autonomous Periodical Interrupt Periods
APICLK
APIR[15:0]
Selected Period
0
0000
0.2 ms
(1)
0
0001
0.4 ms
1
0
0002
0.6 ms
1
0
0003
0.8 ms
1
0
0004
1.0 ms
1
0
0005
1.2 ms
1
0
.....
.....
0
FFFD
13106.8 ms
1
0
FFFE
13107.0 ms
1
0
FFFF
13107.2 ms
1
1
0000
2 * bus clock period
1
0001
4 * bus clock period
1
0002
6 * bus clock period
1
0003
8 * bus clock period
1
0004
10 * bus clock period
1
0005
12 * bus clock period
1
.....
.....
1
FFFD
131068 * bus clock period
1
FFFE
131070 * bus clock period
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
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and
part
numbers
indicated
here
currently
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available
from
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for
import
or
sale
in
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prior
to
September
2010:
S12XE
products
in
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packages
