Chapter 8 S12X Debug (S12XDBGV3) Module
MC9S12XE-Family Reference Manual , Rev. 1.19
330
Freescale Semiconductor
this triggers the state sequencer into the Final State, if configured for end alignment, setting the TRIG bit
disarms the module, ending the session. If breakpoints are enabled, a forced breakpoint request is issued
immediately (end alignment) or when tracing has completed (begin or mid alignment).
8.4.3.6
Trigger Priorities
In case of simultaneous triggers, the priority is resolved according to
. The lower priority trigger
is suppressed. It is thus possible to miss a lower priority trigger if it occurs simultaneously with a trigger
of a higher priority. The trigger priorities described in
dictate that in the case of simultaneous
matches, the match on the lower channel number (0,1,2,3) has priority. The SC[3:0] encoding ensures that
a match leading to final state has priority over all other matches in each state sequencer state. When
configured for range modes a simultaneous match of comparators A and C generates an active match0
whilst match2 is suppressed.
If a write access to DBGC1 with the ARM bit position set occurs simultaneously to a hardware disarm
from an internal trigger event, then the ARM bit is cleared due to the hardware disarm.
8.4.4
State Sequence Control
Figure 8-22. State Sequencer Diagram
The state sequencer allows a defined sequence of events to provide a trigger point for tracing of data in the
trace buffer. Once the S12XDBG module has been armed by setting the ARM bit in the DBGC1 register,
Table 8-42. Trigger Priorities
Priority
Source
Action
Highest
XGATE BKP
Immediate forced breakpoint......(Tracing terminated immediately).
TRIG
Trigger immediately to final state (begin or mid aligned tracing enabled)
Trigger immediately to state 0 (end aligned or no tracing enabled)
External TAGHI/TAGLO
Enter State0
Match0 (force or tag hit)
Trigger to next state as defined by state control registers
Match1 (force or tag hit)
Trigger to next state as defined by state control registers
Match2 (force or tag hit)
Trigger to next state as defined by state control registers
Lowest
Match3 (force or tag hit)
Trigger to next state as defined by state control registers
State1
Final State
State3
ARM = 1
Session Complete
(Disarm)
State2
State 0
(Disarmed)
ARM = 0
ARM = 0
ARM = 0
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
