Chapter 10 XGATE (S12XGATEV3)
MC9S12XE-Family Reference Manual , Rev. 1.19
376
Freescale Semiconductor
Figure 10-25. Algorithm for Locking and Releasing Semaphores
10.4.5
Software Error Detection
Upon detecting an error condition caused by erratic application code, the XGATE module will
immediately terminate program execution and trigger a non-maskable interrupt to the S12X_CPU. There
are three error conditions:
•
Execution of an illegal opcode
•
Illegal opcode fetches
•
Illegal load or store accesses
All opcodes which are not listed in section
Section 10.8, “Instruction Set”
are illegal opcodes. Illegal
opcode fetches as well as illegal load and store accesses are defined on chip level. Refer to the
S12X_MMC Section
for a detailed information.
NOTE
When executing a branch (BCC, BCS,...), a jump (JAL) or an RTS
instruction, the XGATE prefetches and discards the opcode of the following
instruction. The XGATE will perform its software error handling actions
(see above) if this opcode fetch is illegal.
SSEM
0
⇒
XGSEM[
n
]
BCC?
1
⇒
XGSEM[
n
]
CSEM
.........
.........
.........
.........
critical
code
sequence
critical
code
sequence
S12X_CPU
XGATE
XGSEM[
n
] 1?
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
