Chapter 10 XGATE (S12XGATEV3)
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
389
Operation
RD + IMM8:$00
⇒
RD
Adds the content of high byte of register RD and a signed immediate 8 bit constant using binary addition
and stores the result in the high byte of the destination register RD. This instruction can be used after an
ADDL for a 16 bit immediate addition.
Example:
ADDL
R2,#LOWBYTE
ADDH
R2,#HIGHBYTE
; R2 = R2 + 16 bit immediate
CCR Effects
Code and CPU Cycles
ADDH
Add Immediate 8 bit Constant
(High Byte)
ADDH
N
Z
V
C
∆
∆
∆
∆
N:
Set if bit 15 of the result is set; cleared otherwise.
Z:
Set if the result is $0000; cleared otherwise.
V:
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RD[15]
old
& IMM8[7] & RD[15]
new
| RD[15]
old
& IMM8[7] & RD[15]
new
C:
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]
old
& IMM8[7] | RD[15]
old
& RD[15]
new
| IMM8[7] & RD[15]
new
Source Form
Address
Mode
Machine Code
Cycles
ADDH RD, #IMM8
IMM8
1
1
1
0
1
RD
IMM8
P
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
