MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
677
Chapter 18
Periodic Interrupt Timer (S12PIT24B4CV2)
18.1
Introduction
The period interrupt timer (PIT) is an array of 24-bit timers that can be used to trigger peripheral modules
or raise periodic interrupts. Refer to
for a simplified block diagram.
18.1.1
Glossary
18.1.2
Features
The PIT includes these features:
•
Four timers implemented as modulus down-counters with independent time-out periods.
•
Time-out periods selectable between 1 and 2
24
bus clock cycles. Time-out equals m*n bus clock
cycles with 1 <= m <= 256 and 1 <= n <= 65536.
•
Timers that can be enabled individually.
•
Four time-out interrupts.
•
Four time-out trigger output signals available to trigger peripheral modules.
•
Start of timer channels can be aligned to each other.
18.1.3
Modes of Operation
Refer to the device overview for a detailed explanation of the chip modes.
Table 18-1. Revision History
Revision
Number
Revision
Date
Sections
Affected
Description of Changes
V01.00
28 Apr 2005
- Initial Release
V01.01
05 Jul 2005
- Added application section.
- Removed table 1-1
Acronyms and Abbreviations
PIT
Periodic Interrupt Timer
ISR
Interrupt Service Routine
CCR
Condition Code Register
SoC
System on Chip
micro time bases
clock periods of the 16-bit timer modulus down-counters, which are generated by the 8-bit
modulus down-counters.
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
