Machine Specific Layer (MSL)
i.MX51 EVK Linux Reference Manual
Freescale Semiconductor
2-5
2.3.5
Memory Map Programming Interface
The Memory Map is implemented in the
mm.c
file to provide the map between physical and virtual
addresses. It defines an initialization function to be called during system startup.
2.4
IOMUX
The limited number of pins of highly integrated processors can have multiple purposes. The IOMUX
module controls a pin usage so that the same pin can be configured for different purposes and can be used
by different modules. This is a common way to reduce the pin count while meeting the requirements from
various customers. Platforms that do not have the IOMUX hardware module can do pin muxing through
the GPIO module.
The IOMUX module provides the multiplexing control so that each pin may be configured either as a
functional pin or as a GPIO pin. A functional pin can be subdivided into either a primary function or
alternate functions. The pin operation is controlled by a specific hardware module. A GPIO pin, is
controlled by the user through software with further configuration through the GPIO module. For example,
the
UART1_TXD
pin might have the following functions:
•
UART1_TXD—
internal UART1 Transmit Data. This is the primary function of this pin.
•
GPIO6[6]
—alternate mode 1
•
USBPHY1 DATAOUT[14]
—alternate mode 7
If the hardware modes are chosen at the system integration level, this pin is dedicated only to that purpose
and cannot be changed by software. Otherwise, the IOMUX module needs to be configured to serve a
particular purpose that is dictated by the system (board) design. If the pin is connected to an external UART
transceiver and therefore to be used as the UART data transmit signal, it should be configured as the
primary function. If the pin is connected to an external Ethernet controller for interrupting the ARM core,
then it should be configured as GPIO input pin with interrupt enabled. Again, be aware that the software
does not have control over what function a pin should have. The software only configures pin usage
according to the system design.
2.4.1
IOMUX Hardware Operation
The IOMUX controller registers are briefly described here. For detailed information, refer to the pin
multiplexing section of the IC Reference Manual.
•
SW_MUX_CTL—Selects the primary or alternate function of a pin. Also enables loopback mode
when applicable.
•
SW_SELECT_INPUT—Controls pin input path. This register is only required when multiple pads
drive the same internal port.
•
SW_PAD_CTL—Control pad slew rate, driver strength, pull-up/down resistance, and so on.
2.4.2
IOMUX Software Operation
The IOMUX software implementation provides an API to set up pin functionality and pad features.
Summary of Contents for i.MX51 EVK
Page 1: ...Part Number 924 76374 Rev 10 11 01 11 2010 i MX51 EVK Linux Reference Manual...
Page 14: ...i MX51 EVK Linux Reference Manual xiv Freescale Semiconductor...
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Page 38: ...Machine Specific Layer MSL i MX51 EVK Linux Reference Manual 2 8 Freescale Semiconductor...
Page 52: ...MC13892 Digitizer Driver i MX51 EVK Linux Reference Manual 5 4 Freescale Semiconductor...
Page 64: ...TV Encoder TVE Driver i MX51 EVK Linux Reference Manual 10 4 Freescale Semiconductor...
Page 82: ...Video for Linux Two V4L2 Driver i MX51 EVK Linux Reference Manual 12 8 Freescale Semiconductor...
Page 86: ...i MX5 Dual Display i MX51 EVK Linux Reference Manual 13 4 Freescale Semiconductor...
Page 100: ...X Windows Acceleration i MX51 EVK Linux Reference Manual 16 6 Freescale Semiconductor...
Page 118: ...Low Level Keypad Driver i MX51 EVK Linux Reference Manual 20 6 Freescale Semiconductor...
Page 134: ...Security Drivers i MX51 EVK Linux Reference Manual 22 10 Freescale Semiconductor...
Page 148: ...Inter IC I2C Driver i MX51 EVK Linux Reference Manual 24 4 Freescale Semiconductor...
Page 178: ...ARC USB Driver i MX51 EVK Linux Reference Manual 29 10 Freescale Semiconductor...
Page 194: ...OProfile i MX51 EVK Linux Reference Manual 33 6 Freescale Semiconductor...
