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Universal Asynchronous Receiver/Transmitter (UART) Driver

i.MX51 EVK Linux Reference Manual

28-2

Freescale Semiconductor

communication and has support for IrDA 1.0. Each UART contains a 32-byte transmitter FIFO and a
32-half-word deep receiver FIFO. Each UART also supports a variety of maskable interrupts when the data
level in each FIFO reaches a programmed threshold level and when there is a change in state in the modem
signals. Each UART can be programmed to be in DCE or DTE mode.

28.2

Software Operation

The Linux OS contains a core UART driver that manages many of the serial operations that are common
across UART drivers for various platforms. The low-level UART driver is responsible for supplying
information such as the UART port information and a set of control functions to this core UART driver.
These functions are implemented as a low-level interface between the Linux OS and the UART hardware.
They cannot be called from other drivers or from a user application. The control functions used to control
the hardware are passed to the core driver through a structure called

uart_ops

, and the port information is

passed through a structure called

uart_port

. The low level driver is also responsible for handling the

various interrupts for the UART ports, and providing console support if necessary.

Each UART can be configured to use DMA for the data transfer. These configuration options are provided
in the

mxc_uart.h

header file. The user can specify the size of the DMA receive buffer. The minimum size

of this buffer is 512 bytes. The size should be a multiple of 256. The driver breaks the DMA receive buffer
into smaller sub-buffers of 256 bytes and registers these buffers with the DMA system. The DMA transmit
buffer size is fixed at 1024 bytes. The size is limited by the size of the Linux UART transmit buffer (1024).

The driver requests two DMA channels for the UARTs that need DMA transfer. On a receive transaction,
the driver copies the data from the DMA receive buffer to the TTY Flip Buffer.

While using DMA to transmit, the driver copies the data from the UART transmit buffer to the DMA
transmit buffer and sends this buffer to the DMA system. The user should use hardware-driven hardware
flow control when using DMA data transfer. For more information, see the Linux documentation on the
serial driver in the kernel source tree.

The low-level driver supports both interrupt-driven software-controlled hardware flow control and
hardware-driven hardware flow control. The hardware flow control method can be configured using the
options provided in the header file. The user has the capability to de-assert the CTS line using the available
IOCTL calls. If the user wishes to assert the CTS line, then control is transferred back to the receiver, as
long as the driver has been configured to use hardware-driven hardware flow control.

28.3

Driver Features

The UART driver supports the following features:

•

Baud rates up to 4 Mbps

•

Recognizes frame and parity errors only in interrupt-driven mode; does not recognize these errors
in DMA-driven mode

•

Sends, receives and appropriately handles break characters

•

Recognizes the modem control signals

•