Machine Specific Layer (MSL)
i.MX51 EVK Linux Reference Manual
2-2
Freescale Semiconductor
Interrupt Controller registers can only be accessed in supervisor mode. The Interrupt Controller interrupt
requests are prioritized in the order of fast interrupts, and normal interrupts in order of highest priority
level, then highest source number with the same priority. There are sixteen normal interrupt levels for all
interrupt sources, with level zero being the lowest priority. The interrupt levels are configurable through
eight normal interrupt priority level registers. Those registers, along with the Normal Interrupt Mask
Register, support software-controlled priority levels for normal interrupts and priority masking.
2.1.2
Interrupt Software Operation
For ARM-based processors, normal interrupt and fast interrupt are two different exception types. The
exception vector addresses can be configured to start at low address (
0x0
) or high address (
0xFFFF0000
).
The ARM Linux implementation chooses the high vector address model.
The following file has a description of the ARM interrupt architecture.
<ltib_dir>/rpm/BUILD/linux/Documentation/arm/Interrupts
The software provides a processor-specific interrupt structure with callback functions defined in the
irq_chip
structure and exports one initialization function, which is called during system startup.
2.1.3
Interrupt Features
The interrupt implementation supports the following features:
•
Interrupt Controller interrupt disable and enable
•
Functions required by the Linux interrupt architecture as defined in the standard ARM interrupt
source code (mainly the
<ltib_dir>/rpm/BUILD/linux/arch/arm/kernel/irq.c
file)
2.1.4
Interrupt Source Code Structure
The interrupt module is implemented in the following file:
<ltib_dir>/rpm/BUILD/linux/arch/arm/plat-mxc/tzic.c
There are also two header files (located in the include directory specified at the beginning of this chapter):
hardware.h
irqs.h
lists the source files for interrupts.
Table 2-1. Interrupt Files
File
Description
hardware.h
Register descriptions
irqs.h
Declarations for number of interrupts supported
tzic.c
Actual interrupt functions for TZIC modules
tzic.c
Actual interrupt functions for TZIC modules
Summary of Contents for i.MX51 EVK
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