3. If PMCTRL[STOPM]=000 and STOPCTRL[PSTOPO]=00, then VLPS mode is entered instead of STOP. If
PMCTRL[STOPM]=000 and STOPCTRL[PSTOPO]=01 or 10, then only a Partial Stop mode is entered instead of VLPS
13.4.2 Power mode entry/exit sequencing
When entering or exiting low-power modes, the system must conform to an orderly
sequence to manage transitions safely. The SMC manages the system's entry into and exit
from all power modes. The following diagram illustrates the connections of the SMC
with other system components in the chip that are necessary to sequence the system
through all power modes.
System
Mode
Controller
(SMC)
System
Power
(PMC)
System
Clocks
(MCG)
LP exit
Flash
CPU
Clock
Control
Module
(CCM)
Module
Memory
Bus masters low power bus (non-CPU)
Bus slaves low power bus
Stop/Wait
CCM low power bus
MCG enable
PMC low power bus
Flash low power bus
Reset
Control
(RCM)
Module
Figure 13-6. Low-power system components and connections
Chapter 13 System Mode Controller (SMC)
KL02 Sub-Family Reference Manual, Rev. 2.1, July 2013
Freescale Semiconductor, Inc.
173
