M5445
5EVB User
’s
Man
u
al, Re
v
. 4
F
reescale Sem
ic
o
nductor
5
Figure 3. M54455EVB Block Diagram
ColdFire
MCF5445x
SDRAM Bus
DDR2 Term Reg
0.9V VTT
0.9V VREF
MC34702
1.5V
3.3V
1.8V
ATX Power Supply
Barrel Pwr
Connector
5V
MC34702
1.2V
3.3V
1.8V
CPLD
512K Flash
8-bit data bus
Flash0
16MB Flash
8-bit data bus
Flash1
FPGA
MRAM
Buffered Flexbus
PC
I Sl
ot
0
3.3V PCI Bus
PC
I Sl
ot
1
PC
I Sl
ot
2
PC
I Sl
ot
3
PCI Clock Buffer
Programmable Clock
Generator
EX
T
AL
PC
I Ar
bi
Cn
tr
l an
d
In
terr
up
ts
Interfaces for RS232,
RS232-to-USB, DSPI, I2C,
Timers, etc.
SSI Audio
Interface
USB Full-
speed
Interface
USB ULPI
Interface
UL
PI
Dual FEC PHY (RMII
mode) and 2xRJ45 w/
integrated magnetics and
LEDs
F
E
C
0
R
M
II
FE
C
1
R
M
II
/ A
T
A
_
D
A
TA
[8
:1
5]
ATA
ATA_DATA[15:8]
ATA_DATA[7:0], Control
Serial I/O,
Interrupts,
Timers, etc.
D
D
R
2 Pa
ra
lle
l T
erm
ina
tio
n
VTT
VREF
DDR2
4 x 512Kbit (64M8)
Serial Flash
Reset
Configuration
Latch
BDM & JTAG 26-pin Connector
Boot Mode
Selection
Compression Logic
Analyzer Connectors
surrounding processor for
access to all switching
signals
PCI Arbitration and Interrupts
PCI Arbitration and Interrupts
Chip
S
e
le
c
ts
CPLD Switchable Options
Clocks for FPGA, Eth PHY, USB
ATA
Bu
ff
er
ATA_DATA[15:8]
FlexBus