M68HC08RG/AD
12
M68HC08 Family Reference Guide
MOTOROLA
ROR opr8a
RORA
RORX
ROR oprx8,X
ROR ,X
ROR oprx8,SP
Rotate Right through
Carry
– –
DIR
INH
INH
IX1
IX
SP1
36
46
56
66
76
9E66
dd
ff
ff
4
1
1
4
3
5
RSP
Reset Stack Pointer
SP
←
$FF
(High Byte Not Affected)
–
–
–
–
–
–
INH
9C
1
RTI
Return from Interrupt
SP
←
(SP) + $0001; Pull (CCR)
SP
←
(SP) + $0001; Pull (A)
SP
←
(SP) + $0001; Pull (X)
SP
←
(SP) + $0001; Pull (PCH)
SP
←
(SP) + $0001; Pull (PCL)
INH
80
7
RTS
Return from Subroutine
SP
←
SP + $0001
;
Pull
(
PCH)
SP
←
SP + $0001; Pull (PCL)
–
–
–
–
–
–
INH
81
4
SBC #opr8i
SBC opr8a
SBC opr16a
SBC oprx16,X
SBC oprx8,X
SBC ,X
SBC oprx16,SP
SBC oprx8,SP
Subtract with Carry
A
←
(A) – (M) – (C)
– –
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
A2
B2
C2
D2
E2
F2
9ED2
9EE2
ii
dd
hh ll
ee ff
ff
ee ff
ff
2
3
4
4
3
2
5
4
SEC
Set Carry Bit
C
←
1
–
–
–
–
–
1 INH
99
1
SEI
Set Interrupt Mask Bit
I
←
1
–
–
1
–
–
– INH
9B
2
STA opr8a
STA opr16a
STA oprx16,X
STA oprx8,X
STA ,X
STA oprx16,SP
STA oprx8,SP
Store Accumulator in
Memory
M
←
(A)
0
–
–
–
DIR
EXT
IX2
IX1
IX
SP2
SP1
B7
C7
D7
E7
F7
9ED7
9EE7
dd
hh ll
ee ff
ff
ee ff
ff
3
4
4
3
2
5
4
STHX opr
Store H:X (Index Reg.)
(M:M + $0001)
←
(H:X)
0
–
–
–
DIR
35 dd
4
STOP
Enable Interrupts:
Stop Processing
Refer to MCU
Documentation
I bit
←
0; Stop Processing
–
–
0
–
–
–
INH
8E
1
STX opr8a
STX opr16a
STX oprx16,X
STX oprx8,X
STX ,X
STX oprx16,SP
STX oprx8,SP
Store X (Low 8 Bits of
Index Register)
in Memory
M
←
(X)
0
–
–
–
DIR
EXT
IX2
IX1
IX
SP2
SP1
BF
CF
DF
EF
FF
9EDF
9EEF
dd
hh ll
ee ff
ff
ee ff
ff
3
4
4
3
2
5
4
Table 2. Instruction Set Summary (Sheet 7 of 8)
Source
Form
Operation
Description
Effect
on CCR
Ad
dress
M
ode
Opc
o
de
O
p
erand
Cycl
es
V H I N Z C
b0
b7
C
F
re
e
sc
a
le
S
e
m
ic
o
n
d
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c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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c
.
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