Device User Guide — 9S12DT128DGV2/D V02.16
112
Freescale Semiconductor
The setup time can be ignored for this operation.
A.3.1.4 Mass Erase
Erasing a NVM block takes:
The setup time can be ignored for this operation.
A.3.1.5 Blank Check
The time it takes to perform a blank check on the Flash or EEPROM is dependant on the location of the
first non-blank word starting at relative address zero. It takes one bus cycle per word to verify plus a setup
of the command.
Table A-11 NVM Timing Characteristics
Conditions are shown in (Table A-4) unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1
D External Oscillator Clock
f
NVMOSC
0.5
50
1
NOTES
:
1. Restrictions for oscillator in crystal mode apply!
MHz
2
D Bus frequency for Programming or Erase Operations
f
NVMBUS
1
MHz
3
D Operating Frequency
f
NVMOP
150
200
kHz
4
P Single Word Programming Time
t
swpgm
46
2
2. Minimum Programming times are achieved under maximum NVM operating frequency f
NVMOP
and maximum bus frequency
f
bus
.
74.5
3
3. Maximum Erase and Programming times are achieved under particular combinations of f
NVMOP
and bus frequency f
bus
.
Refer to formulae in Sections Section A.3.1.1 Single Word Programming- Section A.3.1.4 Mass Erasefor guidance.
µ
s
5
D Flash Row Programming consecutive word
4
4. Row Programming operations are not applicable to EEPROM
t
bwpgm
20.4
31
µ
s
6
D Flash Row Programming Time for 32 Words
t
brpgm
678.4
1035.5
µ
s
7
P Sector Erase Time
t
era
20
5
5. Minimum Erase times are achieved under maximum NVM operating frequency f
NVMOP
.
26.7
ms
8
P Mass Erase Time
t
mass
100
133
ms
9
D Blank Check Time Flash per block
t
check
11
6
6. Minimum time, if first word in the array is not blank
32778
7
7. Maximum time to complete check on an erased block
t
cyc
10
D Blank Check Time EEPROM per block
t
check
11
1034
t
cyc
t
era
4000
1
f
NVMOP
---------------------
⋅
≈
t
mass
20000
1
f
NVMOP
---------------------
⋅
≈
t
check
location t
cyc
10 t
cyc
⋅
+
⋅
≈
Summary of Contents for MC9S12A128
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