Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
103
2.3.26
Port S Pull Device Enable Register (PERS)
2.3.27
Port S Polarity Select Register (PPSS)
Address 0x024C
Access: User read/write
1
1
Read: Anytime.
Write: Anytime.
7
6
5
4
3
2
1
0
R
PERS7
PERS6
PERS5
PERS4
PERS3
PERS2
PERS1
PERS0
W
Reset
1
1
1
1
1
1
1
1
Figure 2-24. Port S Pull Device Enable Register (PERS)
Table 2-20. PERS Register Field Descriptions
Field
Description
7-0
PERS
Port S pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset all pull devices are enabled.
1 Pull device enabled.
0 Pull device disabled.
Address 0x024D
Access: User read/write
1
1
Read: Anytime.
Write: Anytime.
7
6
5
4
3
2
1
0
R
PPSS7
PPSS6
PPSS5
PPSS4
PPSS3
PPSS2
PPSS1
PPSS0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-25. Port S Polarity Select Register (PPSS)
Table 2-21. PPSS Register Field Descriptions
Field
Description
7-0
PPSS
Port S pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A rising edge on the associated Port S pin sets the associated flag bit in the PIFS register. A pull-down device is
connected to the associated pin, if enabled and if the pin is used as input.
0 A falling edge on the associated Port S pin sets the associated flag bit in the PIFS register. A pull-up device is
connected to the associated pin, if enabled and if the pin is used as input.
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