Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
106
Freescale Semiconductor
2.3.31
Port M Data Register (PTM)
Address 0x0250
Access: User read/write
1
1
Read: Anytime.
Write: Anytime.
7
6
5
4
3
2
1
0
R
0
0
0
0
PTM3
PTM2
PTM1
PTM0
W
--
--
--
--
PWM7
PWM6
PWM5
PWM4
--
--
--
--
IOC1_3
IOC1_2
IOC0_3
IOC0_2
Altern.
Function
--
--
--
--
--
--
TXD1
RXD1
Reset
u
u
u
u
0
0
0
0
= Unimplemented or Reserved
u = Unaffected by reset
Table 2-24. Port M Data Register (PTM)
Table 2-25. PTM Register Field Descriptions
Field
Description
3
PTM
Port M general purpose input/output data—Data Register, PWM channel7,TIM1 output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
•
• The TIM1 output function takes precedence over the PWM7 and general purpose I/O function if the related
channel is enabled.
1
• The PWM7 takes precedence over the general purpose I/O function if enabled
2
PTM
Port M general purpose input/output data—Data Register,PWM channel6,TIM1 output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
•
• The TIM1 output function takes precedence over the PWM6 and general purpose I/O function if the related
channel is enabled.
2
• The PWM6 takes precedence over the general purpose I/O function if enabled
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