Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
115
2.3.46
Port P Routing Register Low(PTPRRL)
The PTPRRH/PTPRRL register configures the re-routing of PWM on alternative ports.
Table 2-36. Port Routing Register High Field Descriptions
Field
Description
7-0
PTPRRH
Port P Routing Register High—
The registers enable the PWM[7:4] routing the Port S/V/P
Address 0x025F
Access: User read/write
1
1
Read: Anytime.
Write: Anytime.
7
6
5
4
3
2
1
0
R
0
0
0
0
PTPRRL3
PTPRRL2
PTPRRL1
PTPRRL0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-43. Port P Routing Register Low(PTPRRL)
Table 2-37. PTPRRL Register Field Descriptions
Field
Description
3-0
PTPRRL
Port P Routing Register Low—
The register decide the PWM[3:0] channel routing on the Port S/P/V
Table 2-38. Module Routing Summary
Module
PTPRRH
PTPRRL
Related Pins
7
6
5
4
3
2
1
0
3
2
1
0
PWM
7
PWM
6
PWM
5
PWM
4
PWM
3
PWM
2
PWM
1
PWM
0
PWM7
0
0
x
x
x
x
x
x
x
x
x
x
PP7
0
1
x
x
x
x
x
x
x
x
x
x
PS1
1
0
x
x
x
x
x
x
x
x
x
x
PV3
1
1
x
x
x
x
x
x
x
x
x
x
PM3
PWM6
x
x
0
0
x
x
x
x
x
x
x
x
PP6
x
x
0
1
x
x
x
x
x
x
x
x
PS0
x
x
1
0
x
x
x
x
x
x
x
x
PV2
x
x
1
1
x
x
x
x
x
x
x
x
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