Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
122
Freescale Semiconductor
2.3.54
Port H Routing Register (PTHRR)
This register configures the re-routing of SCI1 on alternative pins on Port M/H.
2.3.55
PIM Reserved Register
Address 0x0267
Access: User read
1
1
Read: Always reads 0x00
Write: Unimplemented
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
PTHRR0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-51. Port HRouting Register (PTHRR)
Table 2-45. Port H Routing Register Field Descriptions
Field
Description
0
PTHRR
Port H Routing Register—
This register controls the routing of SCI1.
0 SCI1 routed to PH[1:0]
1 SCI1 routed to PM[1:0]
Address 0x0268-0x26F
Access: User read
1
1
Read: Always reads 0x00
Write: Unimplemented
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-52. PIM Reserved Register
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