Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
127
2.3.64
PIM Reserved Registers
2.3.65
Port R Data Register (PTR)
1
Read: Anytime
Write: Anytime
Table 2-51. PER1AD Register Field Descriptions
Field
Description
7-0
PER1AD
Port AD pull-up enable—Enable pull-up device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
Address 0x0278-0x27F
Access: User read
1
1
Read: Always reads 0x00
Write: Unimplemented
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-61. PIM Reserved Registers
Address 0x0280
Access: User read/write
1
1
Read: Anytime The data source is depending on the data direction value.
Write: Anytime
7
6
5
4
3
2
1
0
R
PTR7
PTR6
PTR5
PTR4
PTR3
PTR2
PTR1
PTR0
W
—
SCL
SDA
—
—
—
TXCAN1
RXCAN1
Altern.
Function
FP27
FP18
FP17
FP112
IOC1_7
IOC1_6
IOC0_7
IOC0_6
Reset
0
0
0
0
0
0
0
0
Figure 2-62. Port R Data Register (PTR)
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