Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
129
2.3.66
Port R Input Register (PTIR)
1
PTR
Port R general purpose input/output data—Data Register, TIM0 channels,TX of CAN1
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The TX of CAN1 function takes precedence over the TIM0 and general purpose I/O function
• The TIM0 output compare function takes precedence over the general purpose I/O function
2
0
PTR
Port R general purpose input/output data—Data Register, TIM0 channels,RX of CAN1
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The RX of CAN1 function takes precedence over the TIM0 and general purpose I/O function
• The TIM0 output compare function takes precedence over the general purpose I/O function
3
1
In order TIM input capture to be function correctly, the corresponding DDRR bit should be set as input state
2
In order TIM input capture to be function correctly, the corresponding DDRR bit should be set as input state
3
In order TIM input capture to be function correctly, the corresponding DDRR bit should be set as input state
Address 0x0281
Access: User read
1
1
Read: Anytime.
Write:Never, writes to this register have no effect.
7
6
5
4
3
2
1
0
R
PTIR7
PTIR6
PTIR5
PTIR4
PTIR3
PTIR2
PTIR1
PTIR0
W
Reset
u
u
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-63. Port R Input Register (PTIR)
Table 2-53. PTIR Register Field Descriptions
Field
Description
7-0
PTIR
Port R input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
Table 2-52. PTR Register Field Descriptions (continued)
Field
Description
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