S12XE Clocks and Reset Generator (S12XECRGV2)
MC9S12XHY-Family Reference Manual, Rev. 1.01
272
Freescale Semiconductor
7.3.2.9
S12XECRG COP Control Register (COPCTL)
This register controls the COP (Computer Operating Properly) watchdog.
Read: Anytime
Write:
1. RSBCK: anytime in special modes; write to “1” but not to “0” in all other modes
2. WCOP, CR2, CR1, CR0:
— Anytime in special modes
— Write once in all other modes
– Writing CR[2:0] to “000” has no effect, but counts for the “write once” condition.
– Writing WCOP to “0” has no effect, but counts for the “write once” condition.
0110 (
÷
7)
7x10
3
14x10
3
35x10
3
70x10
3
140x10
3
350x10
3
700x10
3
1.4x10
6
0111 (
÷
8)
8x10
3
16x10
3
40x10
3
80x10
3
160x10
3
400x10
3
800x10
3
1.6x10
6
1000 (
÷
9)
9x10
3
18x10
3
45x10
3
90x10
3
180x10
3
450x10
3
900x10
3
1.8x10
6
1001 (
÷
10)
10 x10
3
20x10
3
50x10
3
100x10
3
200x10
3
500x10
3
1x10
6
2x10
6
1010 (
÷
11)
11 x10
3
22x10
3
55x10
3
110x10
3
220x10
3
550x10
3
1.1x10
6
2.2x10
6
1011 (
÷
12)
12x10
3
24x10
3
60x10
3
120x10
3
240x10
3
600x10
3
1.2x10
6
2.4x10
6
1100 (
÷
13)
13x10
3
26x10
3
65x10
3
130x10
3
260x10
3
650x10
3
1.3x10
6
2.6x10
6
1101 (
÷
14)
14x10
3
28x10
3
70x10
3
140x10
3
280x10
3
700x10
3
1.4x10
6
2.8x10
6
1110 (
÷
15)
15x10
3
30x10
3
75x10
3
150x10
3
300x10
3
750x10
3
1.5x10
6
3x10
6
1111 (
÷
16)
16x10
3
32x10
3
80x10
3
160x10
3
320x10
3
800x10
3
1.6x10
6
3.2x10
6
Module Base + 0x0008
7
6
5
4
3
2
1
0
R
WCOP
RSBCK
0
0
0
CR2
CR1
CR0
W
WRTMASK
Reset
1
0
0
0
0
0
0
0
0
1. Refer to Device User Guide (Section: S12XECRG) for reset values of WCOP, CR2, CR1 and CR0.
= Unimplemented or Reserved
Figure 7-11. S12XECRG COP Control Register (COPCTL)
Table 7-11. RTI Frequency Divide Rates for RTDEC=1
RTR[3:0]
RTR[6:4] =
000
(1x10
3
)
001
(2x10
3
)
010
(5x10
3
)
011
(10x10
3
)
100
(20x10
3
)
101
(50x10
3
)
110
(100x10
3
)
111
(200x10
3
)
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