Device Overview MC9S12XHY-Family
MC9S12XHY-Family Reference Manual, Rev. 1.01
30
Freescale Semiconductor
1.7.2
Pin Assignment Overview
Table 1-5
provides a summary of which Ports are available for each package option. Routing of pin
functions is summarized in
Table 1-6
.
Table 1-5. Port Availability by Package Option
Port
112 LQFP
100 LQFP
Port AD/ADC Channels
12/12
8/8
Port A
8
8
Port B
8
6
Port H
8
8
Port P
8
8
Port R
8
6
Port S
8
8
Port T
8
8
Port U
8
8
Port V
8
8
Port M
4
0
Sum of Ports
88
76
I/O Power Pairs VDDM/VSSM
2/2
2/2
I/O Power Pairs VDDX/VSSX
2/2
2/2
I/O Power Pairs VDDA/VSSA
(1)
1. VRH/VRL are sharing with VDDA/VSSA pins
1/1
1/1
VREG Power Pairs VDDR/VSS3
1/1
1/1
VDD/VSS2
1/1
1/1
VDDF/VSSF
1/1
1/1
I/O Power Pair VDDPLL/VSSPLL
1/1
1/1
VLCD power
1
1
Sum of power pins
19
19
OSC pairs XTAL/EXTAL
1/1
1/1
other pins RESET/TEST/BKGD
1/1/1
1/1/1
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