Pulse-Width Modulator (S12PWM8B8CV1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
425
13.2.3
PWM5 — PWM Channel 5
This pin serves as waveform output of PWM channel 5.
13.2.4
PWM4 — PWM Channel 4
This pin serves as waveform output of PWM channel 4.
13.2.5
PWM3 — PWM Channel 3
This pin serves as waveform output of PWM channel 3.
13.2.6
PWM3 — PWM Channel 2
This pin serves as waveform output of PWM channel 2.
13.2.7
PWM3 — PWM Channel 1
This pin serves as waveform output of PWM channel 1.
13.2.8
PWM3 — PWM Channel 0
This pin serves as waveform output of PWM channel 0.
13.3
Memory Map and Register Definition
This section describes in detail all the registers and register bits in the PWM module.
The special-purpose registers and register bit functions that are not normally available to device end users,
such as factory test control registers and reserved registers, are clearly identified by means of shading the
appropriate portions of address maps and register diagrams. Notes explaining the reasons for restricting
access to the registers and functions are also explained in the individual register descriptions.
13.3.1
Module Memory Map
This section describes the content of the registers in the PWM module. The base address of the PWM
module is determined at the MCU level when the MCU is defined. The register decode map is fixed and
begins at the first address of the module address offset. The figure below shows the registers associated
with the PWM and their relative offset from the base address. The register detail description follows the
order they appear in the register map.
Reserved bits within a register will always read as 0 and the write will be unimplemented. Unimplemented
functions are indicated by shading the bit. .
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