Serial Peripheral Interface (S12SPIV5)
MC9S12XHY-Family Reference Manual Rev. 1.01
Freescale Semiconductor
495
Figure 15-1. SPI Block Diagram
15.2
External Signal Description
This section lists the name and description of all ports including inputs and outputs that do, or may, connect
off chip. The SPI module has a total of four external pins.
15.2.1
MOSI — Master Out/Slave In Pin
This pin is used to transmit data out of the SPI module when it is configured as a master and receive data
when it is configured as slave.
15.2.2
MISO — Master In/Slave Out Pin
This pin is used to transmit data out of the SPI module when it is configured as a slave and receive data
when it is configured as master.
SPI Control Register 1
SPI Control Register 2
SPI Baud Rate Register
SPI Status Register
SPI Data Register
Shifter
Port
Control
Logic
MOSI
SCK
Interrupt Control
SPI
MSB
LSB
LSBFE=1
LSBFE=0
LSBFE=0
LSBFE=1
Data In
LSBFE=1
LSBFE=0
Data Out
Baud Rate Generator
Prescaler
Bus Clock
Counter
Clock Select
SPPR
3
3
SPR
Baud Rate
Phase +
Polarity
Control
Master
Slave
SCK In
SCK Out
Master Baud Rate
Slave Baud Rate
Phase +
Polarity
Control
Control
Control
CPOL
CPHA
2
BIDIROE
SPC0
2
Shift
Sample
Clock
Clock
MODF
SPIF
SPTEF
SPI
Request
Interrupt
SS
electronic components distributor
